| /linux-6.12.1/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 54 #define CLK_TOP_UNIVPLL_D7 43 macro
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| D | mt7629-clk.h | 62 #define CLK_TOP_UNIVPLL_D7 52 macro
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| D | mt7622-clk.h | 56 #define CLK_TOP_UNIVPLL_D7 44 macro
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| D | mediatek,mt6795-clk.h | 82 #define CLK_TOP_UNIVPLL_D7 71 macro
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| D | mt6797-clk.h | 63 #define CLK_TOP_UNIVPLL_D7 53 macro
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| D | mt8173-clk.h | 84 #define CLK_TOP_UNIVPLL_D7 74 macro
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| D | mt6779-clk.h | 73 #define CLK_TOP_UNIVPLL_D7 63 macro
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| D | mt2712-clk.h | 51 #define CLK_TOP_UNIVPLL_D7 20 macro
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| D | mt8183-clk.h | 98 #define CLK_TOP_UNIVPLL_D7 62 macro
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| D | mt8186-clk.h | 112 #define CLK_TOP_UNIVPLL_D7 93 macro
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| D | mt2701-clk.h | 31 #define CLK_TOP_UNIVPLL_D7 21 macro
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| D | mt8192-clk.h | 112 #define CLK_TOP_UNIVPLL_D7 100 macro
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| D | mediatek,mt8188-clk.h | 135 #define CLK_TOP_UNIVPLL_D7 124 macro
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| D | mt8195-clk.h | 169 #define CLK_TOP_UNIVPLL_D7 157 macro
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt6795-topckgen.c | 438 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univ_178p3m", 1, 1, 0),
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| D | clk-mt8173-topckgen.c | 517 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univ_178p3m", 1, 1, 0),
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| D | clk-mt8186-topckgen.c | 47 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7, 0),
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| D | clk-mt7622.c | 298 FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7),
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| D | clk-mt8135.c | 76 FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll_178p3m", 1, 1),
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| D | clk-mt7629.c | 405 FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7),
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| D | clk-mt6797.c | 43 FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7),
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| D | clk-mt8183.c | 64 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7, 0),
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| D | clk-mt2712.c | 59 FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll_ck", 1, 7),
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| D | clk-mt8188-topckgen.c | 59 FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7),
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| D | clk-mt8195-topckgen.c | 71 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7, 0),
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