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Searched refs:CLK_TOP_APLL12_DIV3 (Results 1 – 19 of 19) sorted by relevance

/linux-6.12.1/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c47 CLK_TOP_APLL12_DIV3, enumerator
86 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3",
526 .div_clk_id = CLK_TOP_APLL12_DIV3,
/linux-6.12.1/include/dt-bindings/clock/
Dmt8516-clk.h154 #define CLK_TOP_APLL12_DIV3 122 macro
Dmt6765-clk.h116 #define CLK_TOP_APLL12_DIV3 81 macro
Dmt6779-clk.h141 #define CLK_TOP_APLL12_DIV3 131 macro
Dmt8183-clk.h161 #define CLK_TOP_APLL12_DIV3 125 macro
Dmt8192-clk.h157 #define CLK_TOP_APLL12_DIV3 145 macro
Dmt8195-clk.h233 #define CLK_TOP_APLL12_DIV3 221 macro
/linux-6.12.1/sound/soc/mediatek/mt8192/
Dmt8192-afe-clk.h209 CLK_TOP_APLL12_DIV3, enumerator
Dmt8192-afe-clk.c52 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3",
461 .div_clk_id = CLK_TOP_APLL12_DIV3,
/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt8516.c635 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
Dclk-mt8167.c853 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
Dclk-mt8183.c628 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_sel", 0x320, 5, 0x324, 8, 24),
Dclk-mt8195-topckgen.c1180 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "top_i2so2_mck", 0x0320, 3, 0x0328, 8, 24),
Dclk-mt8192.c703 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_m_sel", 0x320, 3, 0x328, 8, 24),
Dclk-mt6779.c833 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "i2s3_m_ck_sel",
Dclk-mt6765.c519 GATE_TOP2(CLK_TOP_APLL12_DIV3, "apll12_div3", "aud_1_ck", 5),
/linux-6.12.1/arch/arm64/boot/dts/mediatek/
Dmt8183.dtsi1495 <&topckgen CLK_TOP_APLL12_DIV3>,
Dmt8192.dtsi1031 <&topckgen CLK_TOP_APLL12_DIV3>,
Dmt8195.dtsi995 <&topckgen CLK_TOP_APLL12_DIV3>,