Searched refs:CLK_PHYCLK_MIPIDPHY0_RXCLKESC0 (Results 1 – 3 of 3) sorted by relevance
736 #define CLK_PHYCLK_MIPIDPHY0_RXCLKESC0 96 macro
1030 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>,
2871 GATE(CLK_PHYCLK_MIPIDPHY0_RXCLKESC0, "phyclk_mipidphy0_rxclkesc0",