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Searched refs:CLK_MOUT_BPLL (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/include/dt-bindings/clock/
Dexynos5420.h226 #define CLK_MOUT_BPLL 655 macro
Dexynos3250.h268 #define CLK_MOUT_BPLL 9 macro
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos5420.c740 MUX_F(CLK_MOUT_BPLL, "mout_bpll", mout_bpll_p, SRC_CDREX, 0, 1,
1676 clk_prepare_enable(hws[CLK_MOUT_BPLL]->clk); in exynos5x_clk_init()
Dclk-exynos3250.c892 MUX(CLK_MOUT_BPLL, "mout_bpll", mout_bpll_p, SRC_DMC, 10, 1),
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5420.dtsi355 <&clock CLK_MOUT_BPLL>,