Searched refs:CLK_MM_MDP_WROT1 (Results 1 – 12 of 12) sorted by relevance
/linux-6.12.1/drivers/clk/mediatek/ |
D | clk-mt6797-mm.c | 46 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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D | clk-mt6795-mm.c | 46 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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D | clk-mt6779-mm.c | 54 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 18),
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D | clk-mt8173-mm.c | 49 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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D | clk-mt2712-mm.c | 57 GATE_MM0(CLK_MM_MDP_WROT1, "mm_mdp_wrot1", "mm_sel", 13),
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/linux-6.12.1/include/dt-bindings/clock/ |
D | mediatek,mt6795-clk.h | 232 #define CLK_MM_MDP_WROT1 13 macro
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D | mt6797-clk.h | 228 #define CLK_MM_MDP_WROT1 14 macro
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D | mt8173-clk.h | 260 #define CLK_MM_MDP_WROT1 13 macro
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D | mt6779-clk.h | 387 #define CLK_MM_MDP_WROT1 47 macro
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D | mt2712-clk.h | 314 #define CLK_MM_MDP_WROT1 13 macro
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/linux-6.12.1/Documentation/devicetree/bindings/media/ |
D | mediatek-mdp.txt | 92 clocks = <&mmsys CLK_MM_MDP_WROT1>;
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 1069 clocks = <&mmsys CLK_MM_MDP_WROT1>;
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