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Searched refs:CG_UPLL_FUNC_CNTL_3 (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/radeon/
Drv770.c85 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(0x50000), ~UPLL_FB_DIV_MASK); in rv770_set_uvd_clocks()
92 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(1), ~UPLL_FB_DIV(1)); in rv770_set_uvd_clocks()
110 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), in rv770_set_uvd_clocks()
123 WREG32_P(CG_UPLL_FUNC_CNTL_3, 0, ~UPLL_FB_DIV(1)); in rv770_set_uvd_clocks()
Drv770d.h61 #define CG_UPLL_FUNC_CNTL_3 0x720 macro
Dsid.h145 #define CG_UPLL_FUNC_CNTL_3 0x63C macro
Devergreend.h366 #define CG_UPLL_FUNC_CNTL_3 0x720 macro
Devergreen.c1238 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in evergreen_set_uvd_clocks()
Dsi.c7024 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h146 #define CG_UPLL_FUNC_CNTL_3 0x18f macro
Dsi.c1824 WREG32_P(CG_UPLL_FUNC_CNTL_3, UPLL_FB_DIV(fb_div), ~UPLL_FB_DIV_MASK); in si_set_uvd_clocks()