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Searched refs:AUX_SW_DATA (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_aux.h37 SRI(AUX_SW_DATA, DP_AUX, id), \
46 SRI(AUX_SW_DATA, DP_AUX, id), \
56 uint32_t AUX_SW_DATA; member
78 type AUX_SW_DATA;\
101 AUX_SF(AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
102 AUX_SF(AUX_SW_DATA, AUX_SW_DATA_RW, mask_sh),\
103 AUX_SF(AUX_SW_DATA, AUX_SW_INDEX, mask_sh),\
104 AUX_SF(AUX_SW_DATA, AUX_SW_DATA, mask_sh),\
125 AUX_SF(AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
126 AUX_SF(AUX_SW_DATA, AUX_SW_DATA_RW, mask_sh),\
[all …]
Ddce_aux.c242 value = REG_UPDATE_4(AUX_SW_DATA, in submit_channel_request()
246 AUX_SW_DATA, COMPOSE_AUX_SW_DATA_16_20(request->action, request->address)); in submit_channel_request()
248 value = REG_SET_2(AUX_SW_DATA, value, in submit_channel_request()
250 AUX_SW_DATA, COMPOSE_AUX_SW_DATA_8_15(request->address)); in submit_channel_request()
252 value = REG_SET(AUX_SW_DATA, value, in submit_channel_request()
253 AUX_SW_DATA, COMPOSE_AUX_SW_DATA_0_7(request->address)); in submit_channel_request()
256 value = REG_SET(AUX_SW_DATA, value, in submit_channel_request()
257 AUX_SW_DATA, request->length - 1); in submit_channel_request()
269 value = REG_SET(AUX_SW_DATA, value, in submit_channel_request()
270 AUX_SW_DATA, request->data[i]); in submit_channel_request()
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Dradeon_dp_auxch.c121 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
125 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
129 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
133 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
139 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
178 WREG32(AUX_SW_DATA + aux_offset[instance], in radeon_dp_aux_transfer_native()
181 tmp = RREG32(AUX_SW_DATA + aux_offset[instance]); in radeon_dp_aux_transfer_native()
185 tmp = RREG32(AUX_SW_DATA + aux_offset[instance]); in radeon_dp_aux_transfer_native()
Dnid.h866 #define AUX_SW_DATA 0x6218 macro
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/
Ddcn32_resource.h564 SRI_ARR(AUX_SW_DATA, DP_AUX, id), SRI_ARR(AUX_SW_CONTROL, DP_AUX, id), \