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Searched refs:AF11 (Results 1 – 13 of 13) sorted by relevance

/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp13-pinctrl.dtsi70 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
71 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
72 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
74 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
75 <STM32_PINMUX('C', 1, AF11)>, /* ETH_RGMII_GTX_CLK */
76 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
77 <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
84 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
85 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
86 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
[all …]
Dstm32mp15-pinctrl.dtsi222 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
223 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
224 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
225 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
226 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
227 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
228 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
229 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
235 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
241 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
[all …]
Dstm32h7-pinctrl.dtsi59 pinmux = <STM32_PINMUX('G', 11, AF11)>,
60 <STM32_PINMUX('G', 13, AF11)>,
61 <STM32_PINMUX('G', 12, AF11)>,
62 <STM32_PINMUX('C', 4, AF11)>,
63 <STM32_PINMUX('C', 5, AF11)>,
64 <STM32_PINMUX('A', 7, AF11)>,
65 <STM32_PINMUX('C', 1, AF11)>,
66 <STM32_PINMUX('A', 2, AF11)>,
67 <STM32_PINMUX('A', 1, AF11)>;
146 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */
[all …]
Dstm32mp15x-mecio1-io.dtsi479 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
480 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
481 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
482 <STM32_PINMUX('B', 13, AF11)>, /* ETH_RGMII_TXD1 */
483 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
484 <STM32_PINMUX('B', 8, AF11)>, /* ETH_RGMII_TXD3 */
485 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
486 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
492 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
498 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
[all …]
Dstm32mp151c-mect1s.dts96 pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
97 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
98 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
99 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
100 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
104 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
105 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
106 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */
107 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
Dstm32mp151a-prtt1l.dtsi73 pinmux = <STM32_PINMUX('B', 12, AF11)>, /* ETH1_RMII_TXD0 */
74 <STM32_PINMUX('B', 13, AF11)>, /* ETH1_RMII_TXD1 */
75 <STM32_PINMUX('B', 11, AF11)>; /* ETH1_RMII_TX_EN */
79 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
80 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
81 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK input */
82 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
Dstm32f4-pinctrl.dtsi235 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
236 <STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
237 <STM32_PINMUX('C', 2, AF11)>, /* ETH_MII_TXD2 */
238 <STM32_PINMUX('B', 8, AF11)>, /* ETH_MII_TXD3 */
239 <STM32_PINMUX('C', 3, AF11)>, /* ETH_MII_TX_CLK */
240 <STM32_PINMUX('G', 11,AF11)>, /* ETH_MII_TX_EN_ETH_RMII_TX_EN */
241 <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
242 <STM32_PINMUX('C', 1, AF11)>, /* ETH_MDC */
243 <STM32_PINMUX('A', 1, AF11)>, /* ETH_MII_RX_CLK_ETH_RMII_REF_CLK */
244 <STM32_PINMUX('A', 7, AF11)>, /* ETH_MII_RX_DV_ETH_RMII_CRS_DV */
[all …]
Dstm32f7-pinctrl.dtsi279 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
280 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
283 <STM32_PINMUX('D', 6, AF11)>, /* SDMMC2 CLK */
284 <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */
292 pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
293 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
296 <STM32_PINMUX('D', 6, AF11)>; /* SDMMC2 CLK */
302 pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC2 CMD */
383 pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */
386 pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */
[all …]
/linux-6.12.1/include/dt-bindings/pinctrl/
Dstm32-pinfunc.h23 #define AF11 0xc macro
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am6528-iot2050-basic-common.dtsi27 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
Dk3-am654-base-board.dts246 AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
/linux-6.12.1/drivers/pinctrl/aspeed/
Dpinctrl-aspeed-g6.c1214 #define AF11 192 macro
1215 SIG_EXPR_LIST_DECL_SESG(AF11, SALT5, SALT5, SIG_DESC_SET(SCU438, 0));
1216 SIG_EXPR_LIST_DECL_SESG(AF11, WDTRST1, WDTRST1, SIG_DESC_SET(SCU4D8, 0));
1217 PIN_DECL_2(AF11, GPIOY0, SALT5, WDTRST1);
1218 FUNC_GROUP_DECL(SALT5, AF11);
1219 FUNC_GROUP_DECL(WDTRST1, AF11);
1739 ASPEED_PINCTRL_PIN(AF11),
2600 ASPEED_PULL_DOWN_PINCONF(AF11, SCU638, 0),
/linux-6.12.1/Documentation/networking/
Dpktgen.rst225 pgset "tos XX" set former IPv4 TOS field (e.g. "tos 28" for AF11 no ECN, default 00)