Searched +full:vbus +full:- +full:supply (Results 1 – 25 of 641) sorted by relevance
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/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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D | samsung,usb3-drd-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Marek Szyprowski <m.szyprowski@samsung.com> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy 18 0 - UTMI+ type phy, 19 1 - PIPE3 type phy. [all …]
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D | allwinner,sun6i-a31-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun6i-a31-usb-phy 22 - description: PHY Control registers 23 - description: PHY PMU1 registers [all …]
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D | allwinner,sun4i-a10-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun4i-a10-usb-phy 20 - allwinner,sun7i-a20-usb-phy 24 - description: PHY Control registers [all …]
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D | allwinner,sun8i-a23-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a23-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun8i-a23-usb-phy 20 - allwinner,sun8i-a33-usb-phy 24 - description: PHY Control registers [all …]
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D | allwinner,sun50i-a64-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun20i-d1-usb-phy 20 - allwinner,sun50i-a64-usb-phy 24 - description: PHY Control registers [all …]
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D | allwinner,sun8i-a83t-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-a83t-usb-phy 22 - description: PHY Control registers 23 - description: PHY PMU1 registers [all …]
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D | allwinner,sun5i-a13-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun5i-a13-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun5i-a13-usb-phy 22 - description: PHY Control registers 23 - description: PHY PMU1 registers [all …]
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D | allwinner,sun8i-r40-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-r40-usb-phy 22 - description: PHY Control registers 23 - description: PHY PMU0 registers [all …]
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D | allwinner,sun50i-h6-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun50i-h6-usb-phy 22 - description: PHY Control registers 23 - description: PHY PMU0 registers [all …]
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D | allwinner,sun8i-h3-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun8i-h3-usb-phy 20 - allwinner,sun50i-h616-usb-phy 24 - description: PHY Control registers [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/usb/ |
D | usb-nop-xceiv.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/usb-nop-xceiv.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 14 const: usb-nop-xceiv 19 clock-names: 22 clock-frequency: true 24 '#phy-cells': 27 vcc-supply: [all …]
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D | qcom,pmic-typec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,pmic-typec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PMIC based USB Type-C block 10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org> 13 Qualcomm PMIC Type-C block 18 - enum: 19 - qcom,pmi632-typec 20 - qcom,pm8150b-typec [all …]
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D | fcs,fusb302.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Fairchild FUSB302 Type-C Port controller 10 - Rob Herring <robh@kernel.org> 22 vbus-supply: 23 description: VBUS power supply 27 $ref: /schemas/connector/usb-connector.yaml# 31 - compatible 32 - reg [all …]
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt2712-evb.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; 27 stdout-path = "serial0:921600n8"; 30 cpus_fixed_vproc0: regulator-vproc-buck0 { 31 compatible = "regulator-fixed"; 32 regulator-name = "vproc_buck0"; 33 regulator-min-microvolt = <1000000>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/nvidia/ |
D | tegra194-p2888.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/mfd/max77620.h> 27 stdout-path = "serial0:115200n8"; 34 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>; 35 phy-handle = <&phy>; 36 phy-mode = "rgmii-id"; 39 #address-cells = <1>; 40 #size-cells = <0>; 42 phy: ethernet-phy@0 { 43 compatible = "ethernet-phy-ieee802.3-c22"; [all …]
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D | tegra234-p3701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 41 dma-controller@2930000 { 45 interrupt-controller@2a40000 { 58 vcc-supply = <&vdd_1v8_hs>; 59 address-width = <8>; 62 read-only; 70 compatible = "jedec,spi-nor"; 72 spi-max-frequency = <102000000>; 73 spi-tx-bus-width = <4>; 74 spi-rx-bus-width = <4>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/nvidia/ |
D | tegra124-apalis-v1.2-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "tegra124-apalis-v1.2.dtsi" 13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval", 14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1", 28 stdout-path = "serial0:115200n8"; 40 hdmi-supply = <®_5v0>; 46 pex-perst-n-hog { [all …]
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D | tegra124-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "tegra124-apalis.dtsi" 13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1", 27 stdout-path = "serial0:115200n8"; 39 hdmi-supply = <®_5v0>; 45 pex-perst-n-hog { 46 gpio-hog; [all …]
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D | tegra30-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra30-apalis.dtsi" 9 compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30", 23 stdout-path = "serial0:115200n8"; 46 hdmi-supply = <®_5v0>; 52 pex-perst-n-hog { 53 gpio-hog; 55 output-high; [all …]
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D | tegra30-apalis-v1.1-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra30-apalis-v1.1.dtsi" 9 compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval", 10 "toradex,apalis_t30-v1.1", "toradex,apalis_t30", 24 stdout-path = "serial0:115200n8"; 47 hdmi-supply = <®_5v0>; 53 pex-perst-n-hog { 54 gpio-hog; [all …]
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D | tegra30-colibri-eval-v3.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra30-colibri.dtsi" 9 compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30", 22 stdout-path = "serial0:115200n8"; 35 hdmi-supply = <®_5v0>; 39 /* Colibri UART-A */ 41 /delete-property/ dmas; 42 /delete-property/ dma-names; [all …]
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