Home
last modified time | relevance | path

Searched +full:sifive +full:- +full:fu740 +full:- +full:prci (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/clock/sifive/
Dfu740-prci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 SiFive, Inc.
4 ---
5 $id: http://devicetree.org/schemas/clock/sifive/fu740-prci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive FU740 Power Reset Clock Interrupt Controller (PRCI)
11 - Zong Li <zong.li@sifive.com>
12 - Paul Walmsley <paul.walmsley@sifive.com>
15 On the FU740 family of SoCs, most system-wide clock and reset integration
16 is via the PRCI IP block.
[all …]
/linux-6.12.1/arch/riscv/boot/dts/sifive/
Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
26 compatible = "sifive,bullet0", "riscv";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dsifive,fu740-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/sifive,fu740-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive FU740 PCIe host controller
10 SiFive FU740 PCIe host controller is based on the Synopsys DesignWare
13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
16 - Paul Walmsley <paul.walmsley@sifive.com>
17 - Greentime Hu <greentime.hu@sifive.com>
20 - $ref: /schemas/pci/snps,dw-pcie.yaml#
[all …]
/linux-6.12.1/drivers/clk/sifive/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 bool "SiFive SoC driver support"
8 SoC drivers for SiFive Linux-capable SoCs.
13 tristate "PRCI driver for SiFive SoCs"
19 Supports the Power Reset Clock interface (PRCI) IP block found in
20 FU540/FU740 SoCs. If this kernel is meant to run on a SiFive FU540/
21 FU740 SoCs, enable this driver.
Dsifive-prci.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 SiFive, Inc.
11 #include "sifive-prci.h"
12 #include "fu540-prci.h"
13 #include "fu740-prci.h"
20 * __prci_readl() - read from a PRCI register
21 * @pd: PRCI context
22 * @offs: register offset to read from (in bytes, from PRCI base address)
25 * address of the PRCI register target described by @pd, and return
34 return readl_relaxed(pd->va + offs); in __prci_readl()
[all …]
Dfu740-prci.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2020-2021 SiFive, Inc.
4 * Copyright (C) 2020-2021 Zong Li
12 #include <dt-bindings/clock/sifive-fu740-prci.h>
14 #include "sifive-prci.h"
16 /* PRCI integration data for each WRPLL instance */
83 /* List of clock controls provided by the PRCI */
/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dsifive-serial.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/sifive-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive asynchronous serial interface (UART)
10 - Pragnesh Patel <pragnesh.patel@sifive.com>
11 - Paul Walmsley <paul.walmsley@sifive.com>
12 - Palmer Dabbelt <palmer@sifive.com>
15 - $ref: serial.yaml#
20 - enum:
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Dsifive,gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive GPIO controller
10 - Paul Walmsley <paul.walmsley@sifive.com>
15 - enum:
16 - sifive,fu540-c000-gpio
17 - sifive,fu740-c000-gpio
18 - canaan,k210-gpiohs
[all …]