Searched +full:mediatek +full:- +full:thermal (Results 1 – 25 of 42) sorted by relevance
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/linux-6.12.1/Documentation/devicetree/bindings/thermal/ |
D | mediatek,thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek thermal controller for on-SoC temperatures 10 - Sascha Hauer <s.hauer@pengutronix.de> 19 - $ref: thermal-sensor.yaml# 24 - mediatek,mt2701-thermal 25 - mediatek,mt2712-thermal 26 - mediatek,mt7622-thermal [all …]
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D | mediatek,lvts-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek SoC Low Voltage Thermal Sensor (LVTS) 10 - Balsam CHIHI <bchihi@baylibre.com> 13 LVTS is a thermal management architecture composed of three subsystems, 14 a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU), 15 a Converter - Low Voltage Thermal Sensor converter (LVTS), and 21 - mediatek,mt7988-lvts-ap [all …]
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/linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2023 MediaTek Inc. 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 14 #include <dt-bindings/power/mediatek,mt8188-power.h> [all …]
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D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (C) 2020 MediaTek Inc. 4 * Author: Seiya Wang <seiya.wang@mediatek.com> 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> [all …]
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D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (c) 2018 MediaTek Inc. 4 * Author: Ben Ho <ben.ho@mediatek.com> 5 * Erin Lo <erin.lo@mediatek.com> 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/gce/mt8183-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8183-larb-port.h> 13 #include <dt-bindings/power/mt8183-power.h> [all …]
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D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (c) 2021 MediaTek Inc. 4 * Author: Seiya Wang <seiya.wang@mediatek.com> 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> [all …]
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D | mt7986a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (C) 2021 MediaTek Inc. 4 * Author: Sam.Shih <sam.shih@mediatek.com> 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mt7986-clk.h> 10 #include <dt-bindings/reset/mt7986-resets.h> 11 #include <dt-bindings/phy/phy.h> 14 compatible = "mediatek,mt7986a"; 15 interrupt-parent = <&gic>; [all …]
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D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Copyright (C) 2022 MediaTek Inc. 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-bindings/clock/mt8186-clk.h> 8 #include <dt-bindings/gce/mt8186-gce.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/memory/mt8186-memory-port.h> 12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> [all …]
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D | mt7622.dtsi | 2 * Copyright (c) 2017 MediaTek Inc. 3 * Author: Ming Huang <ming.huang@mediatek.com> 4 * Sean Wang <sean.wang@mediatek.com> 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> [all …]
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D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (c) 2018 MediaTek Inc. 4 * Author: Ben Ho <ben.ho@mediatek.com> 5 * Erin Lo <erin.lo@mediatek.com> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <®_vsys>; 28 enable-gpios = <&pio 176 0>; [all …]
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D | mt8395-kontron-3-5-sbc-i1200.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 17 #include <dt-bindings/spmi/spmi.h> 20 model = "Kontron 3.5\"-SBC-i1200"; 21 compatible = "kontron,3-5-sbc-i1200", "mediatek,mt8395", "mediatek,mt8195"; [all …]
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D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014 MediaTek Inc. 4 * Author: Eddie Huang <eddie.huang@mediatek.com> 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> [all …]
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D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (C) 2021 MediaTek Inc. 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; [all …]
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D | mt8183-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (c) 2018 MediaTek Inc. 4 * Author: Ben Ho <ben.ho@mediatek.com> 5 * Erin Lo <erin.lo@mediatek.com> 8 /dts-v1/; 13 model = "MediaTek MT8183 evaluation board"; 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 27 stdout-path = "serial0:921600n8"; 30 reserved-memory { [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ |
D | mediatek,mt2701-auxadc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx) 10 - Zhiyong Tao <zhiyong.tao@mediatek.com> 11 - Matthias Brugger <matthias.bgg@gmail.com> 15 in some Mediatek SoCs which among other things measures the temperatures 17 used by thermal controller which reads the temperatures from the AUXADC 18 directly via its own bus interface. See mediatek-thermal bindings [all …]
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/linux-6.12.1/drivers/thermal/mediatek/ |
D | auxadc_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: Hanyi Wu <hanyi.wu@mediatek.com> 6 * Dawei Chien <dawei.chien@mediatek.com> 7 * Louis Yu <louis.yu@mediatek.com> 15 #include <linux/nvmem-consumer.h> 21 #include <linux/thermal.h> 36 /* Thermal Controller Registers */ 93 /* MT8173 thermal sensors */ 119 #define MT8173_TEMP_MIN -20000 [all …]
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D | lvts_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2023 MediaTek Inc. 8 #include <linux/clk-provider.h> 15 #include <linux/nvmem-consumer.h> 19 #include <linux/thermal.h> 20 #include <dt-bindings/thermal/mediatek,lvts-thermal.h> 83 #define LVTS_COEFF_A_MT8195 -250460 85 #define LVTS_COEFF_A_MT7988 -204650 121 if (!((lvts_ctrl)->valid_sensor_mask & BIT(i))) \ 224 lvts_td->dom_dentry = debugfs_create_dir(dev_name(dev), NULL); in lvts_debugfs_init() [all …]
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/linux-6.12.1/arch/arm/boot/dts/mediatek/ |
D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 5 * Sean Wang <sean.wang@mediatek.com> 6 * Ryder Lee <ryder.lee@mediatek.com> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/mt2701-clk.h> 13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h> 14 #include <dt-bindings/power/mt2701-power.h> 15 #include <dt-bindings/gpio/gpio.h> [all …]
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D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: Erin.Lo <erin.lo@mediatek.com> 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
D | mediatek,mt8195-scpsys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek System Control Processor System 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 13 MediaTek System Control Processor System (SCPSYS) has several 15 domain control, thermal measurement, DVFS, etc. 20 - enum: 21 - mediatek,mt8167-scpsys [all …]
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/linux-6.12.1/drivers/thermal/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Generic thermal drivers configuration 6 menuconfig THERMAL config 7 bool "Thermal drivers" 9 Thermal drivers offer a generic mechanism for 10 thermal management. Usually it's made up of one or more thermal 12 Each thermal zone contains its own temperature, trip points, 14 All platforms with ACPI or Open Firmware thermal support can use 18 if THERMAL 21 bool "Thermal netlink management" [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 5 CFLAGS_thermal_core.o := -I$(src) 6 obj-$(CONFIG_THERMAL) += thermal_sys.o 7 thermal_sys-y += thermal_core.o thermal_sysfs.o 8 thermal_sys-y += thermal_trip.o thermal_helpers.o 10 # netlink interface to manage the thermal framework 11 thermal_sys-$(CONFIG_THERMAL_NETLINK) += thermal_netlink.o 13 thermal_sys-$(CONFIG_THERMAL_DEBUGFS) += thermal_debugfs.o 16 thermal_sys-$(CONFIG_THERMAL_HWMON) += thermal_hwmon.o 17 thermal_sys-$(CONFIG_THERMAL_OF) += thermal_of.o [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/cpufreq/ |
D | cpufreq-mediatek.txt | 1 Binding for MediaTek's CPUFreq driver 5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names. 6 - clock-names: Should contain the following: 7 "cpu" - The multiplexer for clock input of CPU cluster. 8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock 11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for 13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml 15 - proc-supply: Regulator for Vproc of CPU cluster. 18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver 23 - mediatek,cci: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/mediatek/ |
D | mtk-svs.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek Smart Voltage Scaling (SVS) 10 - Roger Lu <roger.lu@mediatek.com> 11 - Matthias Brugger <matthias.bgg@gmail.com> 12 - Kevin Hilman <khilman@kernel.org> 24 - mediatek,mt8183-svs 25 - mediatek,mt8186-svs [all …]
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D | scpsys.txt | 1 MediaTek SCPSYS 5 related tasks in the system. The tasks include thermal measurement, dynamic 11 power/power-domain.yaml. It provides the power domains defined in 12 - include/dt-bindings/power/mt8173-power.h 13 - include/dt-bindings/power/mt6797-power.h 14 - include/dt-bindings/power/mt6765-power.h 15 - include/dt-bindings/power/mt2701-power.h 16 - include/dt-bindings/power/mt2712-power.h 17 - include/dt-bindings/power/mt7622-power.h 20 - compatible: Should be one of: [all …]
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