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/linux-6.12.1/drivers/auxdisplay/
DKconfig236 -1..-17 : connected to the same pin through an inverter (eg: transistor).
251 -1..-17 : connected to the same pin through an inverter (eg: transistor).
266 -1..-17 : connected to the same pin through an inverter (eg: transistor).
281 -1..-17 : connected to the same pin through an inverter (eg: transistor).
296 -1..-17 : connected to the same pin through an inverter (eg: transistor).
311 -1..-17 : connected to the same pin through an inverter (eg: transistor).
/linux-6.12.1/drivers/clk/meson/
Dclk-phase.c130 * This drive a bit clock inverter for which the
131 * opposite value of the inverter bit needs to be manually
/linux-6.12.1/drivers/irqchip/
Dirq-uniphier-aidet.c21 #define UNIPHIER_AIDET_DETCONF 0x04 /* inverter register base */
61 /* enable inverter for active low triggers */ in uniphier_aidet_irq_set_type()
Dqcom-pdc.c106 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
108 * For the inverter to work, the polarity bit in the IRQ_CONFIG register has to
/linux-6.12.1/sound/soc/codecs/
Dmt6359-accdet.c108 /* disable inverter */ in adjust_eint_digital_setting()
113 /* disable inverter */ in adjust_eint_digital_setting()
208 /* enable inverter */ in recover_eint_digital_setting()
214 /* enable inverter */ in recover_eint_digital_setting()
709 /* enable inverter detection */ in config_digital_init_by_mode()
711 /* disable inverter detection */ in config_digital_init_by_mode()
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dsocionext,uniphier-aidet.yaml12 rising edge interrupts. The AIDET provides logic inverter to support low
Dmediatek,mt6577-sysirq.yaml10 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI
/linux-6.12.1/drivers/clk/rockchip/
DMakefile12 clk-rockchip-y += clk-inverter.o
Dclk-rk3188.c340 INVERTER(0, "pclk_cif0", "pclkin_cif0",
369 INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
598 INVERTER(0, "pclk_cif1", "pclkin_cif1",
Dclk-rk3288.c642 INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
821 INVERTER(0, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
823 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
Dclk-rk3368.c463 INVERTER(PCLK_ISP, "pclk_isp", "pclk_isp_in",
468 INVERTER(PCLK_VIP, "pclk_vip", "pclk_vip_in",
Dclk.h909 #define INVERTER(_id, cname, pname, io, is, if) \ macro
Dclk-rv1108.c426 INVERTER(0, "pclk_vip", "ext_vip",
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h618-orangepi-zero3.dts33 * inverter, but it just doesn't work.
/linux-6.12.1/drivers/net/phy/
Dbcm7xxx.c160 * internal inverter may not allow the first MDIO transaction to pass in bcm7xxx_28nm_config_init()
397 * where the internal inverter may not allow the first MDIO transaction in bcm7xxx_28nm_ephy_config_init()
833 * internal inverter may not allow the first MDIO transaction to pass in bcm7xxx_28nm_probe()
Dbcm-cygnus.c139 * internal inverter may not allow the first MDIO transaction to pass in bcm_omega_config_init()
/linux-6.12.1/drivers/rtc/
Drtc-ds1302.c114 * there's an inverter in place, this needs SPI_CS_HIGH! in ds1302_probe()
Drtc-ds1305.c561 * there's an inverter in place, this needs SPI_CS_HIGH! in ds1305_probe()
/linux-6.12.1/drivers/media/rc/
Dst_rc.c47 #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5422-odroidxu3-common.dtsi29 * as a 16ms debouce filter and signal inverter with
/linux-6.12.1/arch/x86/platform/olpc/
Dolpc-xo1-sci.c110 * front-end inverter to ensure that that's the edge we're always in detect_lid_state()
/linux-6.12.1/drivers/pwm/
Dpwm-samsung.c73 * @inverter_mask: inverter status for all channels - one bit per channel
/linux-6.12.1/drivers/gpio/
Dgpiolib-of.c200 * inverter on this board, it should be active-high. Let's fix that in of_gpio_try_fixup_polarity()
/linux-6.12.1/include/drm/
Ddrm_atomic.h1136 * modified between the two bridges, for instance by an inverter on the board.
/linux-6.12.1/include/linux/spi/
Dspi.h1595 * possibly presence of an inverter in the chipselect path.

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