Searched +full:intc +full:- +full:irqpin (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas Interrupt Controller (INTC) for external pins10 - Geert Uytterhoeven <geert+renesas@glider.be>15 - enum:16 - renesas,intc-irqpin-r8a7740 # R-Mobile A117 - renesas,intc-irqpin-r8a7778 # R-Car M1A18 - renesas,intc-irqpin-r8a7779 # R-Car H1[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Renesas INTC External IRQ Pin Driver33 /* INTC external IRQ PIN hardware register access:35 * SENSE is read-write 32-bit with 2-bits or 4-bits per IRQ (*)36 * PRIO is read-write 32-bit with 4-bits per IRQ (**)37 * SOURCE is read-only 32-bit or 8-bit with 1-bit per IRQ (***)38 * MASK is write-only 32-bit or 8-bit with 1-bit per IRQ (***)39 * CLEAR is write-only 32-bit or 8-bit with 1-bit per IRQ (***)41 * (*) May be accessed by more than one driver instance - lock needed42 * (**) Read-modify-write access by one driver instance - lock needed[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_IRQCHIP) += irqchip.o4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Mobile A1 (R8A77400) SoC8 #include <dt-bindings/clock/r8a7740-clock.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>14 interrupt-parent = <&gic>;15 #address-cells = <1>;16 #size-cells = <1>;19 #address-cells = <1>;20 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the SH-Mobile AG5 (R8A73A00/SH73A0) SoC8 #include <dt-bindings/clock/sh73a0-clock.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>14 interrupt-parent = <&gic>;15 #address-cells = <1>;16 #size-cells = <1>;19 #address-cells = <1>;20 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Car M1A (R8A77781) SoC14 #include <dt-bindings/clock/r8a7778-clock.h>15 #include <dt-bindings/interrupt-controller/arm-gic.h>16 #include <dt-bindings/interrupt-controller/irq.h>20 interrupt-parent = <&gic>;21 #address-cells = <1>;22 #size-cells = <1>;25 #address-cells = <1>;26 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Car H1 (R8A77790) SoC9 #include <dt-bindings/clock/r8a7779-clock.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/power/r8a7779-sysc.h>16 interrupt-parent = <&gic>;17 #address-cells = <1>;18 #size-cells = <1>;21 #address-cells = <1>;[all …]