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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx93-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/
11 #include <dt-bindings/leds/common.h>
13 #include "imx93.dtsi"
16 model = "PHYTEC phyCORE-i.MX93";
17 compatible = "phytec,imx93-phycore-som", "fsl,imx93";
19 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 compatible = "shared-dma-pool";
[all …]
Dimx93-kontron-bl-osm-s.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 /dts-v1/;
8 #include "imx93-kontron-osm-s.dtsi"
11 model = "Kontron BL i.MX93 OSM-S";
12 compatible = "kontron,imx93-bl-osm-s", "kontron,imx93-osm-s", "fsl,imx93";
20 compatible = "gpio-leds";
25 linux,default-trigger = "heartbeat";
29 pwm-beeper {
30 compatible = "pwm-beeper";
34 reg_vcc_panel: regulator-vcc-panel {
[all …]
Dimx93-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx93.dtsi"
12 model = "Variscite VAR-SOM-MX93 module";
13 compatible = "variscite,var-som-mx93", "fsl,imx93";
15 mmc_pwrseq: mmc-pwrseq {
16 compatible = "mmc-pwrseq-simple";
17 post-power-on-delay-ms = <100>;
18 power-off-delay-us = <10000>;
19 reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>, /* WIFI_RESET */
[all …]
Dimx93-14x14-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx93.dtsi"
13 compatible = "fsl,imx93-14x14-evk", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
25 compatible = "shared-dma-pool";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dnxp,imx93-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP iMX93 ADC
10 - Haibo Chen <haibo.chen@nxp.com>
13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
15 One-Shot and Scan (continuous) conversions. Programmable DMA
18 also has Self-test logic and Software-initiated calibration.
22 const: nxp,imx93-adc
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dimx93-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx93-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 Clock Control Module
10 - Peng Fan <peng.fan@nxp.com>
13 i.MX93 clock control module is an integrated clock controller, which
14 includes clock generator, clock gate and supplies to all modules.
19 - fsl,imx93-ccm
28 - description: 32k osc
[all …]
Dfsl,imx93-anatop.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,imx93-anatop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 ANATOP Clock Module
10 - Peng Fan <peng.fan@nxp.com>
13 NXP i.MX93 ANATOP module which contains PLL and OSC to Clock Controller
19 - const: fsl,imx93-anatop
24 '#clock-cells':
28 - compatible
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx93-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 Media blk-ctrl
10 - Peng Fan <peng.fan@nxp.com>
15 clocking, reset, and miscellaneous top-level controls for peripherals
21 - const: fsl,imx93-media-blk-ctrl
22 - const: syscon
27 '#power-domain-cells':
[all …]
Dfsl,imx93-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
17 - Deals with all global system reset sources from other modules,
19 - Responsible for power gating of MIXs (Slices) and their memory
25 - const: fsl,imx93-src
26 - const: syscon
33 '#address-cells':
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx93-mipi-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
15 and extensions to them are controlled by i.MX93 media blk-ctrl.
18 - $ref: snps,dw-mipi-dsi.yaml#
22 const: fsl,imx93-mipi-dsi
26 - description: apb clock
27 - description: pixel clock
[all …]
Dfsl,ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb
22 - fsl,imx93-ldb
27 clock-names:
33 reg-names:
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/linux-6.12.1/Documentation/devicetree/bindings/dma/
Dfsl,edma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped registers. channels are split into two groups, called
16 - Peng Fan <peng.fan@nxp.com>
21 - enum:
22 - fsl,vf610-edma
23 - fsl,imx7ulp-edma
24 - fsl,imx8qm-edma
25 - fsl,imx8ulp-edma
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/
Dfsl,lcdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Stefan Agner <stefan@agner.ch>
19 - enum:
20 - fsl,imx23-lcdif
21 - fsl,imx28-lcdif
22 - fsl,imx6sx-lcdif
23 - fsl,imx8mp-lcdif
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dfsl,xcvr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viorel Suman <viorel.suman@nxp.com>
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
25 - fsl,imx95-xcvr
29 - description: 20K RAM for code and data
30 - description: registers space
[all …]
Dfsl,micfil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 The MICFIL digital interface provides a 16-bit or 24-bit audio signal
19 - items:
20 - enum:
21 - fsl,imx95-micfil
22 - const: fsl,imx93-micfil
24 - enum:
[all …]
Dfsl,mqs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
11 - Chancel Liu <chancel.liu@nxp.com>
22 - fsl,imx6sx-mqs
23 - fsl,imx8qm-mqs
24 - fsl,imx8qxp-mqs
25 - fsl,imx93-mqs
26 - fsl,imx95-aonmix-mqs
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dnxp,dwmac-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Clark Wang <xiaoning.wang@nxp.com>
11 - Shawn Guo <shawnguo@kernel.org>
12 - NXP Linux Team <linux-imx@nxp.com>
20 - nxp,imx8mp-dwmac-eqos
21 - nxp,imx8dxl-dwmac-eqos
22 - nxp,imx93-dwmac-eqos
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
[all …]
/linux-6.12.1/drivers/clk/imx/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
2 # common clock support for NXP i.MX SoC family.
4 tristate "IMX clock"
67 tristate "IMX8MM CCM Clock Driver"
71 Build the driver for i.MX8MM CCM Clock Driver
74 tristate "IMX8MN CCM Clock Driver"
78 Build the driver for i.MX8MN CCM Clock Driver
81 tristate "IMX8MP CCM Clock Driver"
86 Build the driver for i.MX8MP CCM Clock Driver
89 tristate "IMX8MQ CCM Clock Driver"
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Di2c-imx-lpi2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 - $ref: /schemas/i2c/i2c-controller.yaml#
20 - enum:
21 - fsl,imx7ulp-lpi2c
[all …]
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-imx.c1 // SPDX-License-Identifier: GPL-2.0
3 * dwmac-imx.c - DWMAC Specific Glue layer for NXP imx8
70 struct imx_priv_data *dwmac = plat_dat->bsp_priv; in imx8mp_set_intf_mode()
73 switch (plat_dat->mac_interface) { in imx8mp_set_intf_mode()
79 val |= (dwmac->rmii_refclk_ext ? 0 : GPR_ENET_QOS_CLK_TX_CLK_SEL); in imx8mp_set_intf_mode()
90 plat_dat->mac_interface); in imx8mp_set_intf_mode()
91 return -EINVAL; in imx8mp_set_intf_mode()
95 return regmap_update_bits(dwmac->intf_regmap, dwmac->intf_reg_off, in imx8mp_set_intf_mode()
110 struct imx_priv_data *dwmac = plat_dat->bsp_priv; in imx93_set_intf_mode()
113 switch (plat_dat->mac_interface) { in imx93_set_intf_mode()
[all …]
/linux-6.12.1/drivers/iio/adc/
Dimx93_adc.c1 // SPDX-License-Identifier: GPL-2.0+
22 #define IMX93_ADC_DRIVER_NAME "imx93-adc"
107 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
109 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
111 ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr, in imx93_adc_power_down()
115 if (ret == -ETIMEDOUT) in imx93_adc_power_down()
116 dev_warn(adc->dev, in imx93_adc_power_down()
126 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_up()
128 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_up()
138 /* config the AD_CLK equal to bus clock */ in imx93_adc_config_ad_clk()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dfsl-imx7ulp-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 - $ref: watchdog.yaml#
20 - const: fsl,imx7ulp-wdt
21 - items:
[all …]

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