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/linux-6.12.1/Documentation/devicetree/bindings/clock/ !
Dimx7d-clock.yaml39 - const: ckil
62 clocks = <&ckil>, <&osc>;
63 clock-names = "ckil", "osc";
Dimx6ul-clock.yaml40 - const: ckil
66 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
67 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6sll-clock.yaml40 - const: ckil
66 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
67 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6sx-clock.yaml42 - const: ckil
70 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
71 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
Dimx8m-clock.yaml72 - const: ckil
119 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
121 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
Dimx6q-clock.yaml42 - const: ckil
Dimx31-clock.yaml21 ckil 2
/linux-6.12.1/drivers/clk/imx/ !
Dclk-imx31.c39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
57 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx31_clocks_init()
Dclk-imx27.c38 "ckil", "fpm", "ckih_gate", "ckih_gate",
57 clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); in _mx27_clocks_init()
58 clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); in _mx27_clocks_init()
Dclk-imx35.c79 /* 81 */ gpu2d_gate, ckil, clk_max enumerator
107 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx35_clocks_init()
Dclk-imx8mq.c271 "sys3_pll_out", "audio_pll1_out", "video_pll1_out", "ckil", };
273 static const char * const pllout_monitor_sels[] = {"osc_25m", "osc_27m", "dummy", "dummy", "ckil",
299 hws[IMX8MQ_CLK_32K] = imx_get_clk_hw_by_name(np, "ckil"); in imx8mq_clocks_probe()
Dclk-imx5.c101 "ipg", "per_root", "ckil", "dummy",};
134 clk[IMX5_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0); in mx5_clocks_common_init()
Dclk-imx6ul.c65 "dummy", "lcdif_pix", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
143 hws[IMX6UL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil"); in imx6ul_clocks_init()
Dclk-imx6sx.c61 "lcdif1_pix", "ahb", "ipg", "perclk", "ckil", "pll4_audio_div",
136 hws[IMX6SX_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil"); in imx6sx_clocks_init()
/linux-6.12.1/drivers/rtc/ !
Drtc-mxc_v2.c49 * To take care of the asynchronous CKIL clock, all writes from the IP domain
50 * will be synchronized to the CKIL domain.
57 /* Wait for 3 CKIL cycles */ in mxc_rtc_sync_lp_locked()
Drtc-snvs.c120 /* Wait for 3 CKIL cycles, about 61.0-91.5 µs */ in rtc_write_sync_lp()
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ !
Dimx6ul-prti6g.dts65 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&clock_ksz8081_out>;
66 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "enet1_ref_pad";
Dimx6sll.dtsi80 ckil: clock-ckil { label
84 clock-output-names = "ckil";
495 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
496 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6ul.dtsi106 ckil: clock-cli { label
110 clock-output-names = "ckil";
575 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
576 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
Dimx6sx.dtsi98 ckil: clock-ckil { label
102 clock-output-names = "ckil";
610 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
611 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
Dimx7s.dtsi98 ckil: clock-cki { label
102 clock-output-names = "ckil";
666 clocks = <&ckil>, <&osc>;
667 clock-names = "ckil", "osc";
Dimx6dl-qmx6.dtsi74 clock-names = "ckil";
Dimx50.dtsi64 ckil {
Dimx51.dtsi50 ckil {
/linux-6.12.1/arch/arm64/boot/dts/freescale/ !
Dimx8mq.dtsi45 ckil: clock-ckil { label
49 clock-output-names = "ckil";
854 clocks = <&ckil>, <&osc_25m>, <&osc_27m>,
857 clock-names = "ckil", "osc_25m", "osc_27m",

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