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/linux-6.12.1/Documentation/devicetree/bindings/display/
Dbrcm,bcm2835-vec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-vec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom VC4 (VideoCore4) VEC
10 - Eric Anholt <eric@anholt.net>
15 - brcm,bcm2711-vec
16 - brcm,bcm2835-vec
27 power-domains:
31 - compatible
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/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm2835-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations.
8 interrupt-parent = <&intc>;
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm2835-dma";
25 /* dma channel 11-14 share one irq */
32 interrupt-names = "dma0",
47 "dma-shared-all";
48 #dma-cells = <1>;
49 brcm,dma-channel-mask = <0x7f35>;
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Dbcm2835-rpi.dtsi1 #include <dt-bindings/power/raspberrypi-power.h>
6 compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
10 compatible = "raspberrypi,firmware-clocks";
11 #clock-cells = <1>;
16 compatible = "raspberrypi,bcm2835-power";
18 #power-domain-cells = <1>;
22 compatible = "brcm,bcm2835-vchiq";
32 clock-names = "lp", "vpu";
33 power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
39 clock-names = "lp", "vpu";
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Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
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Dbcm2835-rpi-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * bcm2835, bcm2836 and bcm2837 implementations that interact with RPi's
8 #include <dt-bindings/power/raspberrypi-power.h>
13 clock-names = "pixel", "hdmi";
17 power-domains = <&power RPI_POWER_DOMAIN_V3D>;
20 &vec {
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm2835-armctrl-ic.txt1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-ic" or
15 "brcm,bcm2836-armctrl-ic"
16 - reg : Specifies base physical address and size of the registers.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
28 Additional required properties for brcm,bcm2836-armctrl-ic:
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/linux-6.12.1/drivers/pmdomain/bcm/
Draspberrypi-power.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/power/raspberrypi-power.h>
14 #include <soc/bcm2835/raspberrypi-firmware.h>
55 bool old_interface = rpi_domain->old_interface; in rpi_firmware_set_power()
59 packet.domain = rpi_domain->domain; in rpi_firmware_set_power()
62 ret = rpi_firmware_property(rpi_domain->fw, old_interface ? in rpi_firmware_set_power()
67 dev_err(&domain->dev, "Failed to set %s to %u (%d)\n", in rpi_firmware_set_power()
70 dev_dbg(&domain->dev, "Set %s to %u\n", in rpi_firmware_set_power()
89 struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index]; in rpi_common_init_power_domain()
91 dom->fw = rpi_domains->fw; in rpi_common_init_power_domain()
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/linux-6.12.1/drivers/gpu/drm/vc4/
Dvc4_vec.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * The VEC encoder generates PAL or NTSC composite video output.
13 * PAL and PAL-M or NTSC and NTSC-J.
41 /* VEC Registers */
85 * VEC_FREQ1_0 contains the most significant 16-bit half-word,
86 * VEC_FREQ3_2 contains the least significant 16-bit half-word.
88 * (which itself is the VEC clock divided by 8).
92 * NTSC (3579545.[45] Hz) - 0x21F07C1F
93 * PAL (4433618.75 Hz) - 0x2A098ACB
94 * PAL-M (3575611.[888111] Hz) - 0x21E6EFE3
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Dvc4_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
22 * pixel valve chooses from the CPRMAN clocks (HSM for HDMI, VEC for
27 * output-specific clock. Since the encoders also directly consume
57 writel(val, vc4_crtc->regs + (offset)); \
63 readl(vc4_crtc->regs + (offset)); \
85 struct vc4_hvs *hvs = vc4->hvs; in vc4_crtc_get_cob_allocation()
87 /* Top/base are supposed to be 4-pixel aligned, but the in vc4_crtc_get_cob_allocation()
94 return top - base + 4; in vc4_crtc_get_cob_allocation()
103 struct drm_device *dev = crtc->dev; in vc4_crtc_get_scanout_position()
105 struct vc4_hvs *hvs = vc4->hvs; in vc4_crtc_get_scanout_position()
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/linux-6.12.1/Documentation/gpu/
Dvc4.rst5 .. kernel-doc:: drivers/gpu/drm/vc4/vc4_drv.c
16 ----------------------
18 .. kernel-doc:: drivers/gpu/drm/vc4/vc4_crtc.c
22 ---
24 .. kernel-doc:: drivers/gpu/drm/vc4/vc4_hvs.c
28 ----------
30 .. kernel-doc:: drivers/gpu/drm/vc4/vc4_plane.c
34 ------------
36 .. kernel-doc:: drivers/gpu/drm/vc4/vc4_hdmi.c
40 -----------
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/linux-6.12.1/drivers/clk/bcm/
Dclk-raspberrypi.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Even though clk-bcm2835 provides an interface to the hardware registers for
8 * over-temperature and under-voltage protections provided by the firmware.
14 #include <linux/clk-provider.h>
19 #include <soc/bcm2835/raspberrypi-firmware.h>
35 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
36 [RPI_FIRMWARE_VEC_CLK_ID] = "vec",
141 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
154 .id = cpu_to_le32(data->id), in raspberrypi_clock_property()
173 struct raspberrypi_clk *rpi = data->rpi; in raspberrypi_fw_is_prepared()
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Dclk-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0+
8 * DOC: BCM2835 CPRMAN (clock manager for the "audio" domain)
27 #include <linux/clk-provider.h>
38 #include <dt-bindings/clock/bcm2835.h>
45 # define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0)
253 # define A2W_PLL_FRAC_MASK ((1 << A2W_PLL_FRAC_BITS) - 1)
337 writel(CM_PASSWORD | val, cprman->regs + reg); in cprman_write()
342 return readl(cprman->regs + reg); in cprman_read()
355 spin_lock(&cprman->regs_lock); in bcm2835_measure_tcnt_mux()
372 dev_err(cprman->dev, "timeout waiting for OSCCOUNT\n"); in bcm2835_measure_tcnt_mux()
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