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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmotorcomm,yt8xxx.yaml23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
32 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
33 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
57 drive strength of rx_clk rgmii pad.
58 The YT8531 RGMII LDO voltage supports 1.8V/3.3V, and the LDO voltage can
74 drive strength of rx_data/rx_ctl rgmii pad.
75 The YT8531 RGMII LDO voltage supports 1.8V/3.3V, and the LDO voltage can
97 Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
103 Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
[all …]
Dibm,emac.txt5 special McMAL DMA controller, and sometimes an RGMII or ZMII
45 Supported values are: "mii", "rmii", "smii", "rgmii",
47 For Axon on CAB, it is "rgmii"
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
57 For Axon: phandle of plb5/plb4/opb/rgmii
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
143 phy-mode = "rgmii";
146 rgmii-device = <&RGMII0>;
[all …]
Dadi,adin.yaml21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
63 phy-mode = "rgmii-id";
Dethernet-controller.yaml78 - rgmii
80 # RGMII with internal RX and TX delays provided by the PHY,
82 - rgmii-id
84 # RGMII with internal RX delay provided by the PHY, the MAC
86 - rgmii-rxid
88 # RGMII with internal TX delay provided by the PHY, the MAC
90 - rgmii-txid
270 - rgmii
271 - rgmii-rxid
272 - rgmii-txid
[all …]
Dxlnx,gmii-to-rgmii.yaml4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
7 title: Xilinx GMII to RGMII Converter
14 Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
24 const: xlnx,gmii-to-rgmii-1.0
55 compatible = "xlnx,gmii-to-rgmii-1.0";
Damlogic,meson-dwmac.yaml64 The internal RGMII TX clock delay (provided by this driver)
65 in nanoseconds. When phy-mode is set to "rgmii" then the TX
67 set to either "rgmii-id" or "rgmii-txid" the TX clock delay
81 The internal RGMII RX clock delay in nanoseconds. Deprecated, use
175 phy-mode = "rgmii";
Dmediatek-dwmac.yaml79 For MT2712 RGMII interface, Allowed value need to be a multiple of 170,
83 For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,
89 For MT2712 RGMII interface, Allowed value need to be a multiple of 170,
93 For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple
112 1. tx clock will be inversed in MII/RGMII case,
122 1. rx clock will be inversed in MII/RGMII case.
159 phy-mode = "rgmii-rxid";
Dqcom,ethqos.yaml33 - const: rgmii
58 - rgmii
89 reg-names = "stmmaceth", "rgmii";
90 clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
112 phy-mode = "rgmii";
Dti,dp83867.yaml25 Media Independent Interface (GMII) or Reduced GMII (RGMII).
81 RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
88 RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
95 PHY_INTERFACE_MODE_RGMII, by default, does not behave as RGMII with no
97 should use "rgmii-id" if internal delays are desired as this may be
98 changed in future to cause "rgmii" mode to disable delays.
/linux-6.12.1/drivers/net/ethernet/ibm/emac/
Drgmii.h3 * drivers/net/ethernet/ibm/emac/rgmii.h
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
25 /* RGMII bridge type */
29 /* RGMII bridge */
35 /* RGMII device */
39 /* RGMII bridge flags */
46 /* number of EMACs using this RGMII bridge */
Drgmii.c3 * drivers/net/ethernet/ibm/emac/rgmii.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
30 // XXX FIXME: Axon seems to support a subset of the RGMII, we
49 /* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
87 /* Check if we need to attach to a RGMII */ in rgmii_attach()
209 * rgmii ? if yes, then we'll add a cell_index in rgmii_dump_regs()
246 /* Check for RGMII flags */ in rgmii_probe()
251 if (of_device_is_compatible(ofdev->dev.of_node, "ibm,rgmii-axon")) in rgmii_probe()
261 "RGMII %pOF initialized with%s MDIO support\n", in rgmii_probe()
289 .compatible = "ibm,rgmii",
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/dsa/
Dnxp,sja1105.yaml87 - rgmii
88 - rgmii-rxid
89 - rgmii-txid
90 - rgmii-id
156 phy-mode = "rgmii-id";
164 phy-mode = "rgmii-id";
172 phy-mode = "rgmii-id";
180 phy-mode = "rgmii-id";
188 phy-mode = "rgmii";
Dmicrochip,lan937x.yaml49 - rgmii
50 - rgmii-id
51 - rgmii-txid
52 - rgmii-rxid
125 phy-mode = "rgmii";
139 phy-mode = "rgmii";
Darrow,xrs700x.yaml18 RGMII ports and one RMII port and are managed via i2c or mdio.
54 phy-mode = "rgmii-id";
60 phy-mode = "rgmii-id";
65 phy-mode = "rgmii-id";
/linux-6.12.1/arch/powerpc/boot/dts/
Deiger.dts278 RGMII0: emac-rgmii@ef600900 {
279 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
284 RGMII1: emac-rgmii@ef600920 {
285 compatible = "ibm,rgmii-460sx", "ibm,rgmii";
320 phy-mode = "rgmii";
322 rgmii-device = <&RGMII0>;
323 rgmii-channel = <0>;
350 phy-mode = "rgmii";
352 rgmii-device = <&RGMII0>;
353 rgmii-channel = <1>;
[all …]
Dglacier.dts315 RGMII0: emac-rgmii@ef601500 {
316 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
321 RGMII1: emac-rgmii@ef601600 {
322 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
357 phy-mode = "rgmii";
359 rgmii-device = <&RGMII0>;
360 rgmii-channel = <0>;
387 phy-mode = "rgmii";
389 rgmii-device = <&RGMII0>;
390 rgmii-channel = <1>;
[all …]
Drainier.dts252 RGMII0: emac-rgmii@ef601000 {
253 compatible = "ibm,rgmii-440grx", "ibm,rgmii";
277 phy-mode = "rgmii";
281 rgmii-device = <&RGMII0>;
282 rgmii-channel = <0>;
306 phy-mode = "rgmii";
310 rgmii-device = <&RGMII0>;
311 rgmii-channel = <1>;
/linux-6.12.1/drivers/net/ethernet/apm/xgene-v2/
Dmac.c21 u32 intf_ctrl, rgmii; in xge_mac_set_speed() local
26 rgmii = xge_rd_csr(pdata, RGMII_REG_0); in xge_mac_set_speed()
37 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
44 SET_REG_BIT(&rgmii, CFG_SPEED_125, 0); in xge_mac_set_speed()
51 SET_REG_BIT(&rgmii, CFG_SPEED_125, 1); in xge_mac_set_speed()
60 xge_wr_csr(pdata, RGMII_REG_0, rgmii); in xge_mac_set_speed()
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-meson8b.c36 * cycle of the 125MHz RGMII TX clock):
74 * Each step is 200ps. These bits are used with external RGMII PHYs
75 * because RGMII RX only has the small window. cfg_rxclk_dly can
220 /* enable RGMII mode */ in meson8b_set_phy_mode()
226 /* disable RGMII mode -> enables RMII mode */ in meson8b_set_phy_mode()
246 /* enable RGMII mode */ in meson_axg_set_phy_mode()
252 /* disable RGMII mode -> enables RMII mode */ in meson_axg_set_phy_mode()
355 /* only relevant for RMII mode -> disable in RGMII mode */ in meson8b_init_prg_eth()
359 /* Configure the 125MHz RGMII TX clock, the IP block changes in meson8b_init_prg_eth()
367 "failed to set RGMII TX clock\n"); in meson8b_init_prg_eth()
[all …]
/linux-6.12.1/arch/mips/include/asm/octeon/
Dcvmx-wqe.h330 * - 2 = jabber error: the RGMII packet was too large
332 * - 3 = overrun error: the RGMII packet is longer
334 * - 4 = oversize error: the RGMII packet is longer
336 * - 5 = alignment error: the RGMII packet is not an
339 * - 6 = fragment error: the RGMII packet is shorter
341 * - 7 = GMX FCS error: the RGMII packet had an FCS
343 * - 8 = undersize error: the RGMII packet is shorter
345 * - 9 = extend error: the RGMII packet had an extend
347 * - 10 = length mismatch error: the RGMII packet had
350 * - 11 = RGMII RX error/SPI4 DIP4 Error: the RGMII
[all …]
Dcvmx-helper-rgmii.h31 * Functions for RGMII/GMII/MII initialization, configuration,
39 * Probe RGMII ports and determine the number present
43 * Returns Number of RGMII/GMII/MII ports (0-4).
49 * Put an RGMII interface in loopback mode. Internal packets sent
59 * to get RGMII to function on the supplied interface.
/linux-6.12.1/arch/arm/boot/dts/nxp/ls/
Dls1021a-tsn.dts62 phy-mode = "rgmii-id";
70 phy-mode = "rgmii-id";
78 phy-mode = "rgmii-id";
86 phy-mode = "rgmii-id";
93 phy-mode = "rgmii";
121 /* RGMII delays added via PCB traces */
123 phy-mode = "rgmii";
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-class-net-phydev42 rmii, rgmii, rgmii-id, rgmii-rxid, rgmii-txid, rtbi, smii
/linux-6.12.1/arch/mips/cavium-octeon/executive/
Dcvmx-helper-rgmii.c29 * Functions for RGMII/GMII/MII initialization, configuration,
46 * Probe RGMII ports and determine the number present
50 * Returns Number of RGMII/GMII/MII ports (0-4).
61 cvmx_dprintf("ERROR: RGMII initialize called in " in __cvmx_helper_rgmii_probe()
92 * Put an RGMII interface in loopback mode. Internal packets sent
153 * to get RGMII to function on the supplied interface.
177 /* Configure the ASX registers needed to use the RGMII ports */ in __cvmx_helper_rgmii_enable()
186 /* Configure the GMX registers needed to use the RGMII ports */ in __cvmx_helper_rgmii_enable()
197 * Configure more flexible RGMII preamble in __cvmx_helper_rgmii_enable()
408 * 0 1 X 0 Port 0 is RGMII in __cvmx_helper_rgmii_link_set()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dstarfive,jh7110-aoncrg.yaml23 - description: GMAC0 RMII reference or GMAC0 RGMII RX
30 - description: GMAC0 RMII reference or GMAC0 RGMII RX
31 - description: STG AXI/AHB or GMAC0 RGMII RX
39 - description: GMAC0 RGMII RX

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