| /linux-6.12.1/arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7343.c | 125 #define MSTP(_parent, _reg, _bit, _flags) \ macro
139 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
140 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
141 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
142 [MSTP028] = MSTP(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
143 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
144 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
145 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
146 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
147 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
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| D | clock-sh7366.c | 128 #define MSTP(_parent, _reg, _bit, _flags) \ macro
142 [MSTP031] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
143 [MSTP030] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
144 [MSTP029] = MSTP(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
145 [MSTP028] = MSTP(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
146 [MSTP026] = MSTP(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
147 [MSTP023] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 23, 0),
148 [MSTP022] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 22, 0),
149 [MSTP021] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 21, 0),
150 [MSTP020] = MSTP(&div4_clks[DIV4_P], MSTPCR0, 20, 0),
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| D | ubc.c | 104 * The UBC MSTP bit is optional, as not all platforms will have in sh4a_ubc_init()
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| D | clock-sh7722.c | 190 /* MSTP clocks */
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| D | clock-sh7723.c | 215 /* MSTP clocks */
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| D | clock-sh7724.c | 281 /* MSTP clocks */
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | renesas,cpg-mstp-clocks.yaml | 4 $id: http://devicetree.org/schemas/clock/renesas,cpg-mstp-clocks.yaml#
7 title: Renesas Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks
17 Clocks are referenced by user nodes by the Module Stop (MSTP) node phandle
24 - renesas,r7s72100-mstp-clocks # RZ/A1
25 - renesas,r8a73a4-mstp-clocks # R-Mobile APE6
26 - renesas,r8a7740-mstp-clocks # R-Mobile A1
27 - renesas,r8a7778-mstp-clocks # R-Car M1
28 - renesas,r8a7779-mstp-clocks # R-Car H1
29 - renesas,sh73a0-mstp-clocks # SH-Mobile AG5
30 - const: renesas,cpg-mstp-clocks
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| D | renesas,cpg-clocks.yaml | 17 the CPG Module Stop (MSTP) Clocks.
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| /linux-6.12.1/drivers/clk/renesas/ |
| D | clk-mstp.c | 3 * R-Car MSTP clocks
25 * MSTP clocks. We can't use standard gate clocks as we need to poll on the
32 * struct mstp_clock_group - MSTP gating clocks group
51 * struct mstp_clock - MSTP gating clock
54 * @group: MSTP clocks group
162 pr_debug("MSTP %s setting CLK_IS_CRITICAL\n", name); in cpg_mstp_clock_register()
204 if (of_device_is_compatible(np, "renesas,r7s72100-mstp-clocks")) in cpg_mstp_clocks_init()
250 CLK_OF_DECLARE(cpg_mstp_clks, "renesas,cpg-mstp-clocks", cpg_mstp_clocks_init);
263 "renesas,cpg-mstp-clocks")) in cpg_mstp_attach_dev()
266 /* BSC on r8a73a4/sh73a0 uses zb_clk instead of an mstp clock */ in cpg_mstp_attach_dev()
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| D | Makefile | 54 obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o
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| D | renesas-cpg-mssr.c | 7 * Based on clk-mstp.c, clk-rcar-gen2.c, and clk-rcar-gen3.c
182 * struct mstp_clock - MSTP gating clock
184 * @index: MSTP clock number
207 dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk, in cpg_mstp_clock_endisable()
455 dev_dbg(dev, "MSTP %s setting CLK_IS_CRITICAL\n", in cpg_mssr_register_mod_clk()
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| D | Kconfig | 246 bool "MSTP clock support" if COMPILE_TEST
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| /linux-6.12.1/arch/arm/boot/dts/renesas/ |
| D | r7s72100.dtsi | 422 /* MSTP clocks */
425 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
434 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
447 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
456 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
465 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
474 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
483 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
495 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
507 compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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| D | r8a7740.dtsi | 642 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
653 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
671 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
699 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
721 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
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| D | r8a7778.dtsi | 564 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
609 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
624 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
648 compatible = "renesas,r8a7778-mstp-clocks", "renesas,cpg-mstp-clocks";
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| D | sh73a0.dtsi | 839 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
850 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
873 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
897 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
925 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
938 compatible = "renesas,sh73a0-mstp-clocks", "renesas,cpg-mstp-clocks";
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| D | r8a73a4.dtsi | 685 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
696 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
712 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
735 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
750 compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
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| D | r8a7779.dtsi | 622 compatible = "renesas,r8a7779-mstp-clocks",
623 "renesas,cpg-mstp-clocks";
661 compatible = "renesas,r8a7779-mstp-clocks",
662 "renesas,cpg-mstp-clocks";
690 compatible = "renesas,r8a7779-mstp-clocks",
691 "renesas,cpg-mstp-clocks";
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | r8a7779-clock.h | 21 /* MSTP 0 */
40 /* MSTP 1 */
52 /* MSTP 3 */
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| /linux-6.12.1/arch/sh/include/asm/ |
| D | hw_breakpoint.h | 40 struct clk *clk; /* optional interface clock / MSTP bit */
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| /linux-6.12.1/arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 114 /* MSTP clocks */
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| D | clock-sh7269.c | 149 /* MSTP clocks */
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| /linux-6.12.1/include/linux/ |
| D | sh_clk.h | 141 * MSTP registration never really cared about access size, despite the
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| /linux-6.12.1/drivers/pmdomain/renesas/ |
| D | rcar-sysc.c | 369 "renesas,cpg-mstp-clocks"); in rcar_sysc_pd_init()
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| /linux-6.12.1/Documentation/networking/ |
| D | bridge.rst | 61 `Multiple Spanning Tree Protocol (MSTP)
|