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/linux-6.12.1/drivers/gpu/drm/i915/gt/uc/
Dintel_gsc_uc.c18 struct intel_gsc_uc *gsc = container_of(work, typeof(*gsc), work); in gsc_work() local
19 struct intel_gt *gt = gsc_uc_to_gt(gsc); in gsc_work()
27 actions = gsc->gsc_work_actions; in gsc_work()
28 gsc->gsc_work_actions = 0; in gsc_work()
32 ret = intel_gsc_uc_fw_upload(gsc); in gsc_work()
47 * first and do proxy later. The GSC will ack the HuC auth and in gsc_work()
50 * Note that we can only do the GSC auth if the GuC auth was in gsc_work()
59 if (!intel_gsc_uc_fw_init_done(gsc)) { in gsc_work()
60 gt_err(gt, "Proxy request received with GSC not loaded!\n"); in gsc_work()
64 ret = intel_gsc_proxy_request_handler(gsc); in gsc_work()
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Dintel_gsc_proxy.c20 * GSC proxy:
21 * The GSC uC needs to communicate with the CSME to perform certain operations.
22 * Since the GSC can't perform this communication directly on platforms where it
23 * is integrated in GT, i915 needs to transfer the messages from GSC to CSME
24 * and back. i915 must manually start the proxy flow after the GSC is loaded to
25 * signal to GSC that we're ready to handle its messages and allow it to query
26 * its init data from CSME; GSC will then trigger an HECI2 interrupt if it needs
29 * 1 - i915 submits a request to GSC asking for the message to CSME
30 * 2 - GSC replies with the proxy header + payload for CSME
31 * 3 - i915 sends the reply from GSC as-is to CSME via the mei proxy component
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Dintel_gsc_fw.c40 bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc, bool needs_wakeref) in intel_gsc_uc_fw_proxy_init_done() argument
43 gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore, in intel_gsc_uc_fw_proxy_init_done()
48 int intel_gsc_uc_fw_proxy_get_status(struct intel_gsc_uc *gsc) in intel_gsc_uc_fw_proxy_get_status() argument
52 if (!intel_uc_fw_is_loadable(&gsc->fw)) in intel_gsc_uc_fw_proxy_get_status()
54 if (__intel_uc_fw_status(&gsc->fw) == INTEL_UC_FIRMWARE_LOAD_FAIL) in intel_gsc_uc_fw_proxy_get_status()
56 if (!intel_gsc_uc_fw_proxy_init_done(gsc, true)) in intel_gsc_uc_fw_proxy_get_status()
62 bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc) in intel_gsc_uc_fw_init_done() argument
64 return gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore, false) & in intel_gsc_uc_fw_init_done()
75 struct intel_gsc_uc *gsc = container_of(gsc_fw, struct intel_gsc_uc, fw); in intel_gsc_fw_get_binary_info() local
76 struct intel_gt *gt = gsc_uc_to_gt(gsc); in intel_gsc_fw_get_binary_info()
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Dintel_gsc_uc.h20 /* GSC-specific additions */
23 * The GSC has 3 version numbers:
39 struct i915_vma *local; /* private memory for GSC usage */
41 struct intel_context *ce; /* for submission to GSC FW via GSC engine */
60 void intel_gsc_uc_init_early(struct intel_gsc_uc *gsc);
61 int intel_gsc_uc_init(struct intel_gsc_uc *gsc);
62 void intel_gsc_uc_fini(struct intel_gsc_uc *gsc);
63 void intel_gsc_uc_suspend(struct intel_gsc_uc *gsc);
64 void intel_gsc_uc_resume(struct intel_gsc_uc *gsc);
65 void intel_gsc_uc_flush_work(struct intel_gsc_uc *gsc);
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Dintel_gsc_uc_heci_cmd_submit.c42 int intel_gsc_uc_heci_cmd_submit_packet(struct intel_gsc_uc *gsc, u64 addr_in, in intel_gsc_uc_heci_cmd_submit_packet() argument
46 struct intel_context *ce = gsc->ce; in intel_gsc_uc_heci_cmd_submit_packet()
87 * pending GSC-HECI submission cycle on the other (non-privileged) path. in intel_gsc_uc_heci_cmd_submit_packet()
90 drm_dbg(&gsc_uc_to_gt(gsc)->i915->drm, in intel_gsc_uc_heci_cmd_submit_packet()
91 "Delay in gsc-heci-priv submission to gsccs-hw"); in intel_gsc_uc_heci_cmd_submit_packet()
99 drm_err(&gsc_uc_to_gt(gsc)->i915->drm, in intel_gsc_uc_heci_cmd_submit_packet()
100 "Request submission for GSC heci cmd failed (%d)\n", in intel_gsc_uc_heci_cmd_submit_packet()
136 intel_gsc_uc_heci_cmd_submit_nonpriv(struct intel_gsc_uc *gsc, in intel_gsc_uc_heci_cmd_submit_nonpriv() argument
186 drm_err(&gsc_uc_to_gt(gsc)->i915->drm, in intel_gsc_uc_heci_cmd_submit_nonpriv()
187 "Failed emit-flush for gsc-heci-non-priv-pkterr=%d\n", err); in intel_gsc_uc_heci_cmd_submit_nonpriv()
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Dintel_huc.c33 * - DG2: load and authentication are both performed via GSC.
37 * workloads via GSC.
63 * MEI-GSC load is an async process. The probing of the exposed aux device
68 * MEI-PXP + HuC load usually takes ~300ms, but if the GSC needs to be resumed
110 /* MEI-GSC init is done, now we wait for MEI-PXP to bind */ in gsc_init_done()
124 huc_notice(huc, "timed out waiting for MEI GSC\n"); in huc_delayed_load_timer_callback()
143 * On resume we don't have to wait for MEI-GSC to be re-probed, but we in huc_delayed_load_start()
160 * GSC device to come up to load the HuC. We arm the fence here in huc_delayed_load_start()
177 struct intel_gsc_intf *intf = &huc_to_gt(huc)->gsc.intf[0]; in gsc_notifier()
207 huc_err(huc, "failed to register GSC notifier %pe\n", ERR_PTR(ret)); in intel_huc_register_gsc_notifier()
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/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_gsc_proxy.c28 * GSC proxy:
29 * The GSC uC needs to communicate with the CSME to perform certain operations.
30 * Since the GSC can't perform this communication directly on platforms where it
32 * GSC to CSME and back. The proxy flow must be manually started after the GSC
33 * is loaded to signal to GSC that we're ready to handle its messages and allow
34 * it to query its init data from CSME; GSC will then trigger an HECI2 interrupt
37 * 1 - Xe submits a request to GSC asking for the message to CSME
38 * 2 - GSC replies with the proxy header + payload for CSME
39 * 3 - Xe sends the reply from GSC as-is to CSME via the mei proxy component
40 * 4 - CSME replies with the proxy header + payload for GSC
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Dxe_gsc.c39 gsc_to_gt(struct xe_gsc *gsc) in gsc_to_gt() argument
41 return container_of(gsc, struct xe_gt, uc.gsc); in gsc_to_gt()
44 static int memcpy_fw(struct xe_gsc *gsc) in memcpy_fw() argument
46 struct xe_gt *gt = gsc_to_gt(gsc); in memcpy_fw()
48 u32 fw_size = gsc->fw.size; in memcpy_fw()
59 xe_map_memcpy_from(xe, storage, &gsc->fw.bo->vmap, 0, fw_size); in memcpy_fw()
60 xe_map_memcpy_to(xe, &gsc->private->vmap, 0, storage, fw_size); in memcpy_fw()
61 xe_map_memset(xe, &gsc->private->vmap, fw_size, 0, gsc->private->size - fw_size); in memcpy_fw()
68 static int emit_gsc_upload(struct xe_gsc *gsc) in emit_gsc_upload() argument
70 struct xe_gt *gt = gsc_to_gt(gsc); in emit_gsc_upload()
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Dxe_gsc_debugfs.c18 gsc_to_gt(struct xe_gsc *gsc) in gsc_to_gt() argument
20 return container_of(gsc, struct xe_gt, uc.gsc); in gsc_to_gt()
24 gsc_to_xe(struct xe_gsc *gsc) in gsc_to_xe() argument
26 return gt_to_xe(gsc_to_gt(gsc)); in gsc_to_xe()
36 struct xe_gsc *gsc = node_to_gsc(m->private); in gsc_info() local
37 struct xe_device *xe = gsc_to_xe(gsc); in gsc_info()
41 xe_gsc_print_info(gsc, &p); in gsc_info()
51 void xe_gsc_debugfs_register(struct xe_gsc *gsc, struct dentry *parent) in xe_gsc_debugfs_register() argument
53 struct drm_minor *minor = gsc_to_xe(gsc)->drm.primary; in xe_gsc_debugfs_register()
58 local = drmm_kmalloc(&gsc_to_xe(gsc)->drm, DEBUGFS_SIZE, GFP_KERNEL); in xe_gsc_debugfs_register()
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Dxe_gsc_submit.c30 * GSC FW allows us to define the host_session_handle as we see fit, as long
39 gsc_to_gt(struct xe_gsc *gsc) in gsc_to_gt() argument
41 return container_of(gsc, struct xe_gt, uc.gsc); in gsc_to_gt()
48 * Returns: random host_session_id which can be used to send messages to gsc cs
60 * xe_gsc_emit_header - write the MTL GSC header in memory
90 * xe_gsc_poison_header - poison the MTL GSC header in memory
132 * @min_payload_size: minimum size of the message excluding the gsc header
151 drm_err(&xe->drm, "GSC header readout indicates error: %d\n", in xe_gsc_read_out_header()
166 * xe_gsc_pkt_submit_kernel - submit a kernel heci pkt to the GSC
167 * @gsc: the GSC uC
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Dxe_gsc_proxy.h13 int xe_gsc_proxy_init(struct xe_gsc *gsc);
14 bool xe_gsc_proxy_init_done(struct xe_gsc *gsc);
15 void xe_gsc_proxy_remove(struct xe_gsc *gsc);
16 int xe_gsc_proxy_start(struct xe_gsc *gsc);
18 int xe_gsc_proxy_request_handler(struct xe_gsc *gsc);
19 void xe_gsc_proxy_irq_handler(struct xe_gsc *gsc, u32 iir);
Dxe_gsc.h16 int xe_gsc_init(struct xe_gsc *gsc);
17 int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
18 void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
19 void xe_gsc_load_start(struct xe_gsc *gsc);
20 void xe_gsc_remove(struct xe_gsc *gsc);
25 void xe_gsc_print_info(struct xe_gsc *gsc, struct drm_printer *p);
/linux-6.12.1/drivers/mfd/
Dgateworks-gsc.c3 * The Gateworks System Controller (GSC) is a multi-function
15 #include <linux/mfd/gsc.h>
26 * The GSC suffers from an errata where occasionally during
72 * gsc_powerdown - API to use GSC to power down board for a specific time
76 static int gsc_powerdown(struct gsc_dev *gsc, unsigned long secs) in gsc_powerdown() argument
81 dev_info(&gsc->i2c->dev, "GSC powerdown for %ld seconds\n", in gsc_powerdown()
85 ret = regmap_bulk_write(gsc->regmap, GSC_TIME_ADD, regs, 4); in gsc_powerdown()
89 ret = regmap_update_bits(gsc->regmap, GSC_CTRL_1, in gsc_powerdown()
95 ret = regmap_update_bits(gsc->regmap, GSC_CTRL_1, in gsc_powerdown()
108 struct gsc_dev *gsc = dev_get_drvdata(dev); in gsc_show() local
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/linux-6.12.1/drivers/media/platform/samsung/exynos-gsc/
Dgsc-m2m.c25 #include "gsc-core.h"
30 struct gsc_dev *gsc = ctx->gsc_dev; in gsc_m2m_ctx_stop_req() local
33 curr_ctx = v4l2_m2m_get_curr_priv(gsc->m2m.m2m_dev); in gsc_m2m_ctx_stop_req()
34 if (!gsc_m2m_pending(gsc) || (curr_ctx != ctx)) in gsc_m2m_ctx_stop_req()
38 ret = wait_event_timeout(gsc->irq_queue, in gsc_m2m_ctx_stop_req()
147 struct gsc_dev *gsc; in gsc_m2m_device_run() local
155 gsc = ctx->gsc_dev; in gsc_m2m_device_run()
156 spin_lock_irqsave(&gsc->slock, flags); in gsc_m2m_device_run()
158 set_bit(ST_M2M_PEND, &gsc->state); in gsc_m2m_device_run()
161 if (gsc->m2m.ctx != ctx) { in gsc_m2m_device_run()
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Dgsc-core.c25 #include "gsc-core.h"
339 void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm) in gsc_set_prefbuf() argument
390 struct gsc_dev *gsc = ctx->gsc_dev; in gsc_try_fmt_mplane() local
391 struct gsc_variant *variant = gsc->variant; in gsc_try_fmt_mplane()
519 struct gsc_dev *gsc = ctx->gsc_dev; in gsc_try_selection() local
520 struct gsc_variant *variant = gsc->variant; in gsc_try_selection()
699 struct gsc_dev *gsc = ctx->gsc_dev; in __gsc_s_ctrl() local
700 struct gsc_variant *variant = gsc->variant; in __gsc_s_ctrl()
861 struct gsc_dev *gsc = priv; in gsc_irq_handler() local
865 gsc_irq = gsc_hw_get_irq_status(gsc); in gsc_irq_handler()
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DMakefile2 exynos-gsc-objs := gsc-core.o gsc-m2m.o gsc-regs.o
4 obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC) += exynos-gsc.o
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_gsc.c43 gsc_ext_om_alloc(struct intel_gsc *gsc, struct intel_gsc_intf *intf, size_t size) in gsc_ext_om_alloc() argument
45 struct intel_gt *gt = gsc_to_gt(gsc); in gsc_ext_om_alloc()
53 gt_err(gt, "Failed to allocate gsc memory\n"); in gsc_ext_om_alloc()
59 gt_err(gt, "Failed to pin pages for gsc memory\n"); in gsc_ext_om_alloc()
94 /* gsc resources and definitions (HECI1 and HECI2) */
108 .name = "mei-gsc",
129 struct intel_gsc *gsc, unsigned int intf_id) in gsc_destroy_one() argument
131 struct intel_gsc_intf *intf = &gsc->intf[intf_id]; in gsc_destroy_one()
137 intel_huc_unregister_gsc_notifier(&gsc_to_gt(gsc)->uc.huc, in gsc_destroy_one()
152 static void gsc_init_one(struct drm_i915_private *i915, struct intel_gsc *gsc, in gsc_init_one() argument
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/linux-6.12.1/Documentation/devicetree/bindings/media/
Dsamsung,exynos5250-gsc.yaml4 $id: http://devicetree.org/schemas/media/samsung,exynos5250-gsc.yaml#
26 - samsung,exynos5250-gsc
27 - samsung,exynos5420-gsc
28 - const: samsung,exynos5-gsc
30 - samsung,exynos5433-gsc
31 - const: samsung,exynos5-gsc
72 - samsung,exynos5-gsc
73 - samsung,exynos5250-gsc
74 - samsung,exynos5420-gsc
102 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
/linux-6.12.1/drivers/parisc/
DKconfig2 menu "Bus options (PCI, PCMCIA, EISA, GSC, ISA)"
4 config GSC config
5 bool "VSC/GSC/HSC bus support"
10 The VSC, GSC and HSC busses were used from the earliest 700-series
18 depends on GSC
25 depends on GSC
33 depends on GSC
44 depends on GSC
50 GSC bridge for an X.25 GSC card.
61 depends on PCI && GSC
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/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dgateworks-gsc.yaml4 $id: http://devicetree.org/schemas/mfd/gateworks-gsc.yaml#
10 The Gateworks System Controller (GSC) is a device present across various
25 pattern: "gsc@[0-9a-f]{1,2}"
27 const: gw,gsc
54 const: gw,gsc-adc
123 const: gw,gsc-fan
152 gsc@20 {
153 compatible = "gw,gsc";
163 compatible = "gw,gsc-adc";
189 compatible = "gw,gsc-fan";
/linux-6.12.1/drivers/gpu/drm/xe/display/
Dxe_hdcp_gsc.c42 struct xe_gsc *gsc = &gt->uc.gsc; in intel_hdcp_gsc_check_status() local
45 if (!gsc && !xe_uc_fw_is_enabled(&gsc->fw)) { in intel_hdcp_gsc_check_status()
47 "GSC Components not ready for HDCP2.x\n"); in intel_hdcp_gsc_check_status()
59 if (!xe_gsc_proxy_init_done(gsc)) in intel_hdcp_gsc_check_status()
68 /*This function helps allocate memory for the command that we will send to gsc cs */
185 struct xe_gsc *gsc = &gt->uc.gsc; in xe_gsc_send_sync() local
188 ret = xe_gsc_pkt_submit_kernel(gsc, hdcp_message->hdcp_cmd_in, msg_size_in, in xe_gsc_send_sync()
191 drm_err(&xe->drm, "failed to send gsc HDCP msg (%d)\n", ret); in xe_gsc_send_sync()
242 /* Only try again if gsc says so */ in intel_hdcp_gsc_msg_send()
/linux-6.12.1/Documentation/hwmon/
Dgsc-hwmon.rst3 Kernel driver gsc-hwmon
6 Supported chips: Gateworks GSC
7 Datasheet: http://trac.gateworks.com/wiki/gsc
14 various ADC's connected to the GSC, and optional FAN controller available
22 on the GSC version and firmware. The values returned by the driver do not need
33 either internally or by the driver depending on the GSC version and firmware.
43 The GSC features 1 PWM output that operates in automatic mode where the
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_hdcp_gsc.c30 struct intel_gsc_uc *gsc = gt ? &gt->uc.gsc : NULL; in intel_hdcp_gsc_check_status() local
32 if (!gsc || !intel_uc_fw_is_running(&gsc->fw)) { in intel_hdcp_gsc_check_status()
34 "GSC components required for HDCP2.2 are not ready\n"); in intel_hdcp_gsc_check_status()
41 /*This function helps allocate memory for the command that we will send to gsc cs */
61 drm_err(&i915->drm, "Failed to map gsc message page!\n"); in intel_hdcp_gsc_initialize_message()
177 ret = intel_gsc_uc_heci_cmd_submit_packet(&gt->uc.gsc, addr_in, in intel_gsc_send_sync()
182 drm_err(&i915->drm, "failed to send gsc HDCP msg (%d)\n", ret); in intel_gsc_send_sync()
188 * blocked us from sending message to gsc cs in intel_gsc_send_sync()
213 * gsc cs memory header as stated in specs after which the normal HDCP payload
259 /* Only try again if gsc says so */ in intel_hdcp_gsc_msg_send()
/linux-6.12.1/include/drm/intel/
Di915_gsc_proxy_mei_interface.h15 * struct i915_gsc_proxy_component_ops - ops for GSC Proxy services.
17 * @send: sends a proxy message from GSC FW to ME FW
18 * @recv: receives a proxy message for GSC FW from ME FW
44 * MEI drivers for GSC proxy services
45 * @mei_dev: device that provide the GSC proxy service.
46 * @ops: Ops implemented by GSC proxy driver, used by i915 driver.
/linux-6.12.1/drivers/gpu/drm/i915/pxp/
Dintel_pxp_gsccs.c92 /* copy caller provided gsc message handle if this is polling for a prior msg completion */ in gsccs_send_message()
113 ret = intel_gsc_uc_heci_cmd_submit_nonpriv(&gt->uc.gsc, in gsccs_send_message()
117 drm_err(&i915->drm, "failed to send gsc PXP msg (%d)\n", ret); in gsccs_send_message()
123 drm_err(&i915->drm, "gsc PXP reply with invalid validity marker\n"); in gsccs_send_message()
128 drm_dbg(&i915->drm, "gsc PXP reply status has error = 0x%08x\n", in gsccs_send_message()
134 drm_dbg(&i915->drm, "gsc PXP reply is busy\n"); in gsccs_send_message()
136 * When the GSC firmware replies with pending bit, it means that the requested in gsccs_send_message()
174 * Keep sending request if GSC firmware was busy. Based on fw specs + in gsccs_send_message_retry_complete()
181 /* Only try again if gsc says so */ in gsccs_send_message_retry_complete()
194 * GSC-fw loading, HuC-fw loading, HuC-fw authentication and in intel_pxp_gsccs_is_ready_for_sessions()
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