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/linux-6.12.1/Documentation/devicetree/bindings/pci/
Dxilinx-versal-cpm.yaml55 const: 0
87 interrupts = <0 72 4>;
89 interrupt-map-mask = <0 0 0 7>;
90 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
91 <0 0 0 2 &pcie_intc_0 1>,
92 <0 0 0 3 &pcie_intc_0 2>,
93 <0 0 0 4 &pcie_intc_0 3>;
94 bus-range = <0x00 0xff>;
95 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
96 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
[all …]
/linux-6.12.1/arch/mips/jazz/
Dirq.c62 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); in init_r4030_ints()
69 * driver compatibility reasons interrupts 0 - 15 to be the i8259
79 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ in arch_init_irq()
80 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); in arch_init_irq()
81 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ in arch_init_irq()
82 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); in arch_init_irq()
83 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ in arch_init_irq()
84 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); in arch_init_irq()
106 if (likely(irq > 0)) in plat_irq_dispatch()
Dsetup.c30 .start = 0x00,
31 .end = 0x1f,
35 .start = 0x40,
36 .end = 0x5f,
40 .start = 0x80,
41 .end = 0x8f,
45 .start = 0xc0,
46 .end = 0xdf,
56 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ in plat_mem_setup()
57 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); in plat_mem_setup()
[all …]
/linux-6.12.1/arch/mips/include/asm/
Djazz.h15 * but many hardware register are accessible at 0xb9000000 in
16 * instead of 0xe0000000.
19 #define JAZZ_LOCAL_IO_SPACE 0xe0000000
24 * 0xf0000000 - Rev1
25 * 0xf0000001 - Rev2
26 * 0xf0000002 - Rev3
28 #define PICA_ASIC_REVISION 0xe0000008
43 * --------- . (0)
45 #define PICA_LED 0xe000f000
54 #define LED_DOT 0x01
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amd/
Damd-seattle-soc.dtsi20 reg = <0x0 0xe1110000 0 0x1000>,
21 <0x0 0xe112f000 0 0x2000>,
22 <0x0 0xe1140000 0 0x2000>,
23 <0x0 0xe1160000 0 0x2000>;
24 interrupts = <1 9 0xf04>;
25 ranges = <0 0 0 0xe1100000 0 0x100000>;
29 reg = <0x0 0x00080000 0 0x1000>;
35 interrupts = <1 13 0xff04>,
36 <1 14 0xff04>,
37 <1 11 0xff04>,
[all …]
/linux-6.12.1/arch/arc/plat-axs10x/
Daxs10x.c16 #define AXS_MB_CGU 0xE0010000
17 #define AXS_MB_CREG 0xE0011000
19 #define CREG_MB_IRQ_MUX (AXS_MB_CREG + 0x214)
20 #define CREG_MB_SW_RESET (AXS_MB_CREG + 0x220)
21 #define CREG_MB_VER (AXS_MB_CREG + 0x230)
22 #define CREG_MB_CONFIG (AXS_MB_CREG + 0x234)
24 #define AXC001_CREG 0xF0001000
25 #define AXC001_GPIO_INTC 0xF0003000
61 #define GPIO_INTEN (AXC001_GPIO_INTC + 0x30) in axs10x_enable_gpio_intc_wire()
62 #define GPIO_INTMASK (AXC001_GPIO_INTC + 0x34) in axs10x_enable_gpio_intc_wire()
[all …]