| /linux-6.12.1/drivers/gpu/drm/msm/adreno/ |
| D | adreno_gpu.h | 270 static inline uint8_t adreno_patchid(const struct adreno_gpu *gpu) in adreno_patchid()
280 static inline bool adreno_is_revn(const struct adreno_gpu *gpu, uint32_t revn) in adreno_is_revn()
287 static inline bool adreno_has_gmu_wrapper(const struct adreno_gpu *gpu) in adreno_has_gmu_wrapper()
292 static inline bool adreno_is_a2xx(const struct adreno_gpu *gpu) in adreno_is_a2xx()
299 static inline bool adreno_is_a20x(const struct adreno_gpu *gpu) in adreno_is_a20x()
306 static inline bool adreno_is_a225(const struct adreno_gpu *gpu) in adreno_is_a225()
311 static inline bool adreno_is_a305(const struct adreno_gpu *gpu) in adreno_is_a305()
316 static inline bool adreno_is_a305b(const struct adreno_gpu *gpu) in adreno_is_a305b()
321 static inline bool adreno_is_a306(const struct adreno_gpu *gpu) in adreno_is_a306()
327 static inline bool adreno_is_a306a(const struct adreno_gpu *gpu) in adreno_is_a306a()
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| D | a6xx_gpu.c | 19 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
37 static bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
56 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
69 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
198 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a6xx_submit()
281 static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a7xx_submit()
408 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
479 static void a6xx_set_cp_protect(struct msm_gpu *gpu) in a6xx_set_cp_protect()
504 static void a6xx_calc_ubwc_config(struct adreno_gpu *gpu) in a6xx_calc_ubwc_config()
568 static void a6xx_set_ubwc_config(struct msm_gpu *gpu) in a6xx_set_ubwc_config()
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| D | a4xx_gpu.c | 25 static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a4xx_submit()
76 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
156 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
183 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
350 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
371 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
385 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
402 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
551 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu) in a4xx_gpu_state_get()
565 static void a4xx_dump(struct msm_gpu *gpu) in a4xx_dump()
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| D | a5xx_gpu.c | 21 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
33 void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in a5xx_flush()
66 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb()
127 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit()
444 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
475 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
517 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
580 static int a5xx_ucode_load(struct msm_gpu *gpu) in a5xx_ucode_load()
642 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
662 static int a5xx_zap_shader_init(struct msm_gpu *gpu) in a5xx_zap_shader_init()
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| D | a3xx_gpu.c | 31 static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a3xx_submit()
85 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
112 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
366 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
387 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
401 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
419 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
474 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
481 static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) in a3xx_gpu_state_get()
495 static u64 a3xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) in a3xx_gpu_busy()
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| D | a2xx_gpu.c | 13 static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a2xx_submit()
54 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
108 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
266 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
287 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
299 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
317 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
448 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
455 static struct msm_gpu_state *a2xx_gpu_state_get(struct msm_gpu *gpu) in a2xx_gpu_state_get()
470 a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) in a2xx_create_address_space()
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| D | adreno_gpu.c | 30 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt()
176 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
195 adreno_create_address_space(struct msm_gpu *gpu, in adreno_create_address_space()
202 adreno_iommu_create_address_space(struct msm_gpu *gpu, in adreno_iommu_create_address_space()
236 u64 adreno_private_address_space_size(struct msm_gpu *gpu) in adreno_private_address_space_size()
253 int adreno_fault_handler(struct msm_gpu *gpu, unsigned long iova, int flags, in adreno_fault_handler()
309 int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, in adreno_get_param()
394 int adreno_set_param(struct msm_gpu *gpu, struct msm_file_private *ctx, in adreno_set_param()
554 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, in adreno_fw_create_bo()
573 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
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| D | a5xx_preempt.c | 25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
83 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer() local
94 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
174 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
216 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
249 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring() local
291 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
303 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
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| D | a6xx_gpu_state.c | 131 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
144 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
174 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
222 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
246 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
300 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
336 static void a6xx_get_debugbus_blocks(struct msm_gpu *gpu, in a6xx_get_debugbus_blocks()
383 static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu, in a7xx_get_debugbus_blocks()
430 static void a6xx_get_debugbus(struct msm_gpu *gpu, in a6xx_get_debugbus()
545 static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu, in a6xx_get_dbgahb_cluster()
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| D | adreno_device.c | 62 struct msm_gpu *gpu = NULL; in adreno_load_gpu() local
183 struct msm_gpu *gpu; in adreno_bind() local
226 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_unbind() local
295 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_resume() local
302 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_suspend() local
314 static void suspend_scheduler(struct msm_gpu *gpu) in suspend_scheduler()
336 static void resume_scheduler(struct msm_gpu *gpu) in resume_scheduler()
349 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_suspend() local
376 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_resume() local
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| D | a5xx_power.c | 103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup()
175 static void a540_lm_setup(struct msm_gpu *gpu) in a540_lm_setup()
211 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
220 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
278 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
295 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
324 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
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| D | a5xx_debugfs.c | 14 static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
27 static void me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
40 static void meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
53 static void roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
97 struct msm_gpu *gpu = priv->gpu; in reset_set() local
144 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
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| D | a6xx_gmu.c | 24 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault() local
108 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp, in a6xx_gmu_set_freq()
169 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu) in a6xx_gmu_get_freq()
947 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_force_off() local
985 static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_freq()
999 static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_bw()
1015 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_resume() local
1187 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_gmu_stop() local
1399 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init() local
1449 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_pwrlevels_probe() local
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| /linux-6.12.1/drivers/gpu/drm/msm/ |
| D | msm_gpu.c | 25 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
49 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
58 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
70 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
88 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
93 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
99 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume()
125 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend()
151 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_file_private *ctx, in msm_gpu_show_fdinfo()
159 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init()
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| D | msm_gpu_devfreq.c | 22 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_target() local
59 static unsigned long get_freq(struct msm_gpu *gpu) in get_freq()
80 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_dev_status() local
133 static bool has_devfreq(struct msm_gpu *gpu) in has_devfreq()
139 void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
211 void msm_devfreq_cleanup(struct msm_gpu *gpu) in msm_devfreq_cleanup()
222 void msm_devfreq_resume(struct msm_gpu *gpu) in msm_devfreq_resume()
239 void msm_devfreq_suspend(struct msm_gpu *gpu) in msm_devfreq_suspend()
264 void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor) in msm_devfreq_boost()
288 void msm_devfreq_active(struct msm_gpu *gpu) in msm_devfreq_active()
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| D | msm_gpu.h | 318 static inline bool msm_gpu_active(struct msm_gpu *gpu) in msm_gpu_active()
466 static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio, in msm_gpu_convert_priority()
565 static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) in gpu_write()
570 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read()
575 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or) in gpu_rmw()
580 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg) in gpu_read64()
604 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64()
683 static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu) in msm_gpu_crashstate_get()
699 static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu) in msm_gpu_crashstate_put()
715 #define check_apriv(gpu, flags) \ argument
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| D | msm_ringbuffer.c | 18 struct msm_gpu *gpu = submit->gpu; in msm_job_run() local
59 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
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| D | msm_debugfs.c | 37 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show() local
57 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release() local
72 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open() local
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| /linux-6.12.1/drivers/gpu/drm/etnaviv/ |
| D | etnaviv_gpu.c | 39 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) in etnaviv_gpu_get_param()
175 static inline bool etnaviv_is_model_rev(struct etnaviv_gpu *gpu, u32 model, u32 revision) in etnaviv_is_model_rev()
184 static void etnaviv_hw_specs(struct etnaviv_gpu *gpu) in etnaviv_hw_specs()
334 static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) in etnaviv_hw_identify()
475 static void etnaviv_gpu_load_clock(struct etnaviv_gpu *gpu, u32 clock) in etnaviv_gpu_load_clock()
482 static void etnaviv_gpu_update_clock(struct etnaviv_gpu *gpu) in etnaviv_gpu_update_clock()
508 static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) in etnaviv_hw_reset()
609 static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu) in etnaviv_gpu_enable_mlcg()
669 void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch) in etnaviv_gpu_start_fe()
683 static void etnaviv_gpu_start_fe_idleloop(struct etnaviv_gpu *gpu, in etnaviv_gpu_start_fe_idleloop()
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| D | etnaviv_perfmon.c | 40 static u32 perf_reg_read(struct etnaviv_gpu *gpu, in perf_reg_read()
49 static inline void pipe_select(struct etnaviv_gpu *gpu, u32 clock, unsigned pipe) in pipe_select()
57 static u32 pipe_perf_reg_read(struct etnaviv_gpu *gpu, in pipe_perf_reg_read()
76 static u32 pipe_reg_read(struct etnaviv_gpu *gpu, in pipe_reg_read()
95 static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu, in hi_total_cycle_read()
109 static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu, in hi_total_idle_cycle_read()
462 static unsigned int num_pm_domains(const struct etnaviv_gpu *gpu) in num_pm_domains()
476 static const struct etnaviv_pm_domain *pm_domain(const struct etnaviv_gpu *gpu, in pm_domain()
499 int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu, in etnaviv_pm_query_dom()
523 int etnaviv_pm_query_sig(struct etnaviv_gpu *gpu, in etnaviv_pm_query_sig()
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| D | etnaviv_buffer.c | 90 static void etnaviv_cmd_select_pipe(struct etnaviv_gpu *gpu, in etnaviv_cmd_select_pipe()
116 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, in etnaviv_buffer_dump()
152 static u32 etnaviv_buffer_reserve(struct etnaviv_gpu *gpu, in etnaviv_buffer_reserve()
163 u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu) in etnaviv_buffer_init()
180 u16 etnaviv_buffer_config_mmuv2(struct etnaviv_gpu *gpu, u32 mtlb_addr, u32 safe_addr) in etnaviv_buffer_config_mmuv2()
215 u16 etnaviv_buffer_config_pta(struct etnaviv_gpu *gpu, unsigned short id) in etnaviv_buffer_config_pta()
233 void etnaviv_buffer_end(struct etnaviv_gpu *gpu) in etnaviv_buffer_end()
301 void etnaviv_sync_point_queue(struct etnaviv_gpu *gpu, unsigned int event) in etnaviv_sync_point_queue()
340 void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state, in etnaviv_buffer_queue()
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| D | etnaviv_drv.c | 85 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_open() local
112 struct etnaviv_gpu *gpu = priv->gpu[i]; in etnaviv_postclose() local
150 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_mmu_show()
180 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_buffer_dump()
201 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m) in etnaviv_ring_show()
227 struct etnaviv_gpu *gpu; in show_each_gpu() local
271 struct etnaviv_gpu *gpu; in etnaviv_ioctl_get_param() local
364 struct etnaviv_gpu *gpu; in etnaviv_ioctl_wait_fence() local
414 struct etnaviv_gpu *gpu; in etnaviv_ioctl_gem_wait() local
446 struct etnaviv_gpu *gpu; in etnaviv_ioctl_pm_query_dom() local
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| D | etnaviv_sched.c | 37 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_timedout_job() local
100 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_sched_push_job() local
132 int etnaviv_sched_init(struct etnaviv_gpu *gpu) in etnaviv_sched_init()
147 void etnaviv_sched_fini(struct etnaviv_gpu *gpu) in etnaviv_sched_fini()
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| D | etnaviv_gpu.h | 167 static inline void gpu_write(struct etnaviv_gpu *gpu, u32 reg, u32 data) in gpu_write()
172 static inline u32 gpu_read(struct etnaviv_gpu *gpu, u32 reg) in gpu_read()
184 static inline u32 gpu_fix_power_address(struct etnaviv_gpu *gpu, u32 reg) in gpu_fix_power_address()
194 static inline void gpu_write_power(struct etnaviv_gpu *gpu, u32 reg, u32 data) in gpu_write_power()
199 static inline u32 gpu_read_power(struct etnaviv_gpu *gpu, u32 reg) in gpu_read_power()
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| D | etnaviv_iommu_v2.c | 165 static void etnaviv_iommuv2_restore_nonsec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_nonsec()
189 static void etnaviv_iommuv2_restore_sec(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore_sec()
244 static void etnaviv_iommuv2_restore(struct etnaviv_gpu *gpu, in etnaviv_iommuv2_restore()
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