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Searched defs:_pwr_reg (Results 1 – 22 of 22) sorted by relevance

/linux-6.12.1/drivers/clk/mediatek/
Dclk-mt7986-apmixed.c23 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
36 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
Dclk-mt7981-apmixed.c25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
38 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
Dclk-mt8516-apmixedsys.c23 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
43 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt2712-apmixedsys.c21 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
44 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8167-apmixedsys.c22 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
42 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt7622-apmixedsys.c20 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
41 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8365-apmixedsys.c19 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
45 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8173-apmixedsys.c24 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
44 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8183-apmixedsys.c54 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
81 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
Dclk-mt8192-apmixedsys.c35 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
63 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
Dclk-mt8195-apusys_pll.c28 #define PLL(_id, _name, _reg, _pwr_reg, _pd_reg, _pcw_reg) { \ argument
Dclk-mt7988-apmixed.c22 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, _pcwbits, _pd_reg, \ argument
Dclk-mt8135-apmixedsys.c20 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
Dclk-mt7629.c23 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
44 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt6797.c599 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
619 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8188-apmixedsys.c32 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
Dclk-mt6779.c1145 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1172 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
Dclk-mt8186-apmixedsys.c19 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
Dclk-mt6765.c671 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
695 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt6795-apmixedsys.c26 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
Dclk-mt8195-apmixedsys.c33 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
Dclk-mt2701.c921 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument