Home
last modified time | relevance | path

Searched defs:_mask (Results 1 – 25 of 100) sorted by relevance

1234

/linux-6.12.1/include/linux/
Dbitfield.h63 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ argument
86 #define FIELD_MAX(_mask) \ argument
99 #define FIELD_FIT(_mask, _val) \ argument
113 #define FIELD_PREP(_mask, _val) \ argument
133 #define FIELD_PREP_CONST(_mask, _val) \ argument
153 #define FIELD_GET(_mask, _reg) \ argument
/linux-6.12.1/tools/include/linux/
Dbitfield.h60 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ argument
82 #define FIELD_MAX(_mask) \ argument
95 #define FIELD_FIT(_mask, _val) \ argument
109 #define FIELD_PREP(_mask, _val) \ argument
123 #define FIELD_GET(_mask, _reg) \ argument
/linux-6.12.1/arch/arm/probes/
Ddecode.h304 #define DECODE_HEADER(_type, _mask, _value, _regs) \ argument
315 #define DECODE_TABLE(_mask, _value, _table) \ argument
325 #define DECODE_CUSTOM(_mask, _value, _decoder) \ argument
335 #define DECODE_SIMULATEX(_mask, _value, _handler, _regs) \ argument
339 #define DECODE_SIMULATE(_mask, _value, _handler) \ argument
348 #define DECODE_EMULATEX(_mask, _value, _handler, _regs) \ argument
352 #define DECODE_EMULATE(_mask, _value, _handler) \ argument
360 #define DECODE_OR(_mask, _value) \ argument
373 #define DECODE_REJECT(_mask, _value) \ argument
/linux-6.12.1/drivers/pmdomain/mediatek/
Dmt8365-pm-domains.h13 #define MT8365_BUS_PROT_INFRA_WR_TOPAXI(_mask) \ argument
19 #define MT8365_BUS_PROT_INFRA_WR_TOPAXI_1(_mask) \ argument
Dmtk-pm-domains.h65 #define BUS_PROT_WR(_hwip, _mask, _set, _clr, _sta) \ argument
68 #define BUS_PROT_WR_IGN(_hwip, _mask, _set, _clr, _sta) \ argument
72 #define BUS_PROT_UPDATE(_hwip, _mask, _set, _clr, _sta) \ argument
76 #define BUS_PROT_INFRA_UPDATE_TOPAXI(_mask) \ argument
/linux-6.12.1/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.c21 #define _VOP_REG(off, _mask, _shift, _write_mask, _relaxed) \ argument
30 #define VOP_REG(off, _mask, _shift) \ argument
33 #define VOP_REG_SYNC(off, _mask, _shift) \ argument
36 #define VOP_REG_MASK_SYNC(off, _mask, _shift) \ argument
/linux-6.12.1/drivers/bcma/
Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
192 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
/linux-6.12.1/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
Dpinctrl-armada-37xx.c123 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
133 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
143 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
153 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ argument
/linux-6.12.1/drivers/pinctrl/mediatek/
Dpinctrl-mtmips.h12 #define GRP(_name, _func, _mask, _shift) \ argument
17 #define GRP_G(_name, _func, _mask, _gpio, _shift) \ argument
/linux-6.12.1/drivers/ufs/host/
Dufs-renesas.c45 #define PARAM_SAVE(_reg, _mask, _index) \ argument
48 #define PARAM_POLL(_reg, _expected, _mask) \ argument
126 #define PARAM_INDIRECT_POLL(_gpio, _addr, _expected, _mask) \ argument
/linux-6.12.1/include/linux/soc/mediatek/
Dmtk_wed.h275 #define mtk_wed_device_start(_dev, _mask) (_dev)->ops->start(_dev, _mask) argument
284 #define mtk_wed_device_irq_get(_dev, _mask) \ argument
286 #define mtk_wed_device_irq_set_mask(_dev, _mask) \ argument
298 #define mtk_wed_device_start_hw_rro(_dev, _mask, _reset) \ argument
313 #define mtk_wed_device_start(_dev, _mask) do {} while (0) argument
318 #define mtk_wed_device_irq_get(_dev, _mask) 0 argument
319 #define mtk_wed_device_irq_set_mask(_dev, _mask) do {} while (0) argument
326 #define mtk_wed_device_start_hw_rro(_dev, _mask, _reset) do {} while (0) argument
/linux-6.12.1/drivers/ssb/
Dpci.c171 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
173 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
176 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
179 #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ argument
/linux-6.12.1/drivers/net/ethernet/sfc/falcon/
Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
/linux-6.12.1/drivers/net/ethernet/sfc/siena/
Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
/linux-6.12.1/drivers/net/ethernet/sfc/
Denum.h117 #define LOOPBACK_CHANGED(_from, _to, _mask) \ argument
120 #define LOOPBACK_OUT_OF(_from, _to, _mask) \ argument
/linux-6.12.1/drivers/net/ethernet/mediatek/
Dmtk_wed_debugfs.c29 #define DUMP_REG_MASK(_reg, _mask) \ argument
38 #define DUMP_WED_MASK(_reg, _mask) DUMP_REG_MASK(_reg, _mask) argument
/linux-6.12.1/drivers/clk/st/
Dclkgen.h38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ argument
/linux-6.12.1/drivers/clk/at91/
Dpmc.h119 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) argument
120 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) argument
/linux-6.12.1/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_acl.c532 #define MLXSW_SP_ACL_MANGLE_ACTION(_htype, _offset, _mask, _shift, _field) \ argument
541 #define MLXSW_SP_ACL_MANGLE_ACTION_IP4(_offset, _mask, _shift, _field) \ argument
545 #define MLXSW_SP_ACL_MANGLE_ACTION_IP6(_offset, _mask, _shift, _field) \ argument
549 #define MLXSW_SP_ACL_MANGLE_ACTION_TCP(_offset, _mask, _shift, _field) \ argument
552 #define MLXSW_SP_ACL_MANGLE_ACTION_UDP(_offset, _mask, _shift, _field) \ argument
/linux-6.12.1/drivers/mfd/
Dwcd934x.c19 #define WCD934X_REGMAP_IRQ_REG(_irq, _off, _mask) \ argument
/linux-6.12.1/drivers/iio/adc/
Dmax1363.c190 #define MAX1363_MODE_SINGLE(_num, _mask) { \ argument
197 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \ argument
205 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \ argument
212 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \ argument
220 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \ argument
228 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \ argument
/linux-6.12.1/arch/sh/kernel/cpu/sh4a/
Dclock-sh7757.c62 #define DIV4(_bit, _mask, _flags) \ argument
Dclock-shx3.c61 #define DIV4(_bit, _mask, _flags) \ argument
/linux-6.12.1/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c77 #define DIV4(_reg, _bit, _mask, _flags) \ argument

1234