| /wlan-driver/qca-wifi-host-cmn/hif/src/snoc/ |
| D | if_ahb.c | 687 uint32_t reg_offset = 0; in hif_ahb_irq_enable() local
695 reg_offset = HOST_IE_ADDRESS; in hif_ahb_irq_enable()
697 regval = hif_read32_mb(scn, mem + reg_offset); in hif_ahb_irq_enable()
699 hif_write32_mb(scn, mem + reg_offset, regval); in hif_ahb_irq_enable()
703 reg_offset = HOST_IE_ADDRESS_2; in hif_ahb_irq_enable()
705 regval = hif_read32_mb(scn, mem + reg_offset); in hif_ahb_irq_enable()
707 hif_write32_mb(scn, mem + reg_offset, regval); in hif_ahb_irq_enable()
741 uint32_t reg_offset = 0; in hif_ahb_irq_disable() local
749 reg_offset = HOST_IE_ADDRESS; in hif_ahb_irq_disable()
751 regval = hif_read32_mb(scn, mem + reg_offset); in hif_ahb_irq_disable()
[all …]
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| /wlan-driver/qca-wifi-host-cmn/hal/wifi3.0/ |
| D | hal_srng.c | 97 record->reg_offset = offset; in hal_reg_wr_fail_history_add()
1442 uint32_t reg_offset; in hal_reo_read_write_ctrl_ix() local
1450 reg_offset = in hal_reo_read_write_ctrl_ix()
1453 *ix0 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1457 reg_offset = in hal_reo_read_write_ctrl_ix()
1460 *ix1 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1464 reg_offset = in hal_reo_read_write_ctrl_ix()
1467 *ix2 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
1471 reg_offset = in hal_reo_read_write_ctrl_ix()
1474 *ix3 = HAL_REG_READ(hal, reg_offset); in hal_reo_read_write_ctrl_ix()
[all …]
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| /wlan-driver/platform/cnss2/ |
| D | debug.c | 402 u32 reg_offset, mem_type; in cnss_reg_read_debug_write() local
432 if (kstrtou32(token, 0, ®_offset)) in cnss_reg_read_debug_write()
444 ret = cnss_bus_debug_reg_read(plat_priv, reg_offset, ®_val, in cnss_reg_read_debug_write()
450 reg_offset); in cnss_reg_read_debug_write()
469 ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, reg_offset, in cnss_reg_read_debug_write()
478 plat_priv->diag_reg_read_addr = reg_offset; in cnss_reg_read_debug_write()
519 u32 reg_offset, mem_type, reg_val; in cnss_reg_write_debug_write() local
547 if (kstrtou32(token, 0, ®_offset)) in cnss_reg_write_debug_write()
559 ret = cnss_bus_debug_reg_write(plat_priv, reg_offset, reg_val, in cnss_reg_write_debug_write()
565 reg_offset); in cnss_reg_write_debug_write()
[all …]
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| /wlan-driver/platform/icnss2/ |
| D | debug.c | 30 uint32_t reg_offset, mem_type, reg_val; in icnss_regwrite_write() local
62 if (kstrtou32(token, 0, ®_offset)) in icnss_regwrite_write()
72 ret = wlfw_athdiag_write_send_sync_msg(priv, reg_offset, mem_type, in icnss_regwrite_write()
176 if (kstrtou32(token, 0, ®_info_ptr->reg_offset)) in icnss_reg_parse()
220 ret = wlfw_athdiag_read_send_sync_msg(priv, reg_info.reg_offset, in icnss_regread_write()
230 priv->diag_reg_read_addr = reg_info.reg_offset; in icnss_regread_write()
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| /wlan-driver/fw-api/hw/qca6290/11ax/v1/ |
| D | seq_hwio.h | 81 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca6290/11ax/v2/ |
| D | seq_hwio.h | 81 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qcn9000/ |
| D | seq_hwio.h | 98 uint32_t seq_poll(uint32_t reg_offset, uint32_t expect_value, uint32_t value_mask, uint32_t value_s…
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| /wlan-driver/fw-api/hw/qca6390/v1/ |
| D | seq_hwio.h | 99 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qcc2072/v1/ |
| D | seq_hwio.h | 50 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qcn9224/v1/ |
| D | seq_hwio.h | 69 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/wcn7750/v1/ |
| D | seq_hwio.h | 50 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca5018/ |
| D | seq_hwio.h | 98 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca5332/ |
| D | seq_hwio.h | 81 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca5424/ |
| D | seq_hwio.h | 62 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/kiwi/v1/ |
| D | seq_hwio.h | 73 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca6290/v1/ |
| D | seq_hwio.h | 100 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/kiwi/v2/ |
| D | seq_hwio.h | 54 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/peach/v1/ |
| D | seq_hwio.h | 50 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/peach/v2/ |
| D | seq_hwio.h | 50 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qcn6432/ |
| D | seq_hwio.h | 79 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qcn9224/v2/ |
| D | seq_hwio.h | 69 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca9574/ |
| D | seq_hwio.h | 98 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca6490/v1/ |
| D | seq_hwio.h | 100 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/wcn6450/v1/ |
| D | seq_hwio.h | 54 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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| /wlan-driver/fw-api/hw/qca6750/v1/ |
| D | seq_hwio.h | 100 extern uint32 seq_poll(uint32 reg_offset, uint32 expect_value, uint32 value_mask, uint32 value_shif…
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