1 /*
2  * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
3  * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 /**
21  * DOC: cdp_txrx_mon_struct.h
22  * Define the monitor mode API structure
23  * shared by data path and the OS interface module
24  */
25 
26 #ifndef _CDP_TXRX_MON_STRUCT_H_
27 #define _CDP_TXRX_MON_STRUCT_H_
28 
29 #ifdef QCA_SUPPORT_LITE_MONITOR
30 
31 #define CDP_LITE_MON_PEER_MAX 16
32 
33 #define CDP_MON_FRM_TYPE_MAX 3
34 #define CDP_MON_FRM_FILTER_MODE_MAX 4
35 
36 #define CDP_LITE_MON_LEN_64B 0x40
37 #define CDP_LITE_MON_LEN_128B 0x80
38 #define CDP_LITE_MON_LEN_256B 0x100
39 #define CDP_LITE_MON_LEN_FULL 0xFFFF
40 
41 #define CDP_LITE_MON_FILTER_ALL 0xFFFF
42 
43 /* This should align with nac mac type enumerations in ieee80211_ioctl.h */
44 #define CDP_LITE_MON_PEER_MAC_TYPE_CLIENT 2
45 
46 /**
47  * enum cdp_lite_mon_legacy_filter - legacy filters for tx/rx
48  * @LEGACY_FILTER_DISABLED: No filter / filter disabled
49  * @LEGACY_FILTER_MCOPY: M_Copy filter
50  * @LEGACY_FILTER_TX_CAPTURE: Tx_Capture filter
51  * @LEGACY_FILTER_RX_ENH_CAPTURE: Rx Enhance capture filter
52  * @LEGACY_FILTER_ADV_MON_FILTER: Advance Monitor filter
53  *
54  * Use to identify which filter is currently enabled using lite mon
55  */
56 enum cdp_lite_mon_legacy_filter {
57 	LEGACY_FILTER_DISABLED = 0,
58 	LEGACY_FILTER_MCOPY = 1,
59 	LEGACY_FILTER_TX_CAPTURE = 2,
60 	LEGACY_FILTER_RX_ENH_CAPTURE = 3,
61 	LEGACY_FILTER_ADV_MON_FILTER = 4,
62 };
63 
64 /**
65  * enum cdp_lite_mon_level- lite mon frame levels
66  * @CDP_LITE_MON_LEVEL_INVALID: level invalid
67  * @CDP_LITE_MON_LEVEL_MSDU: level msdu
68  * @CDP_LITE_MON_LEVEL_MPDU: level mpdu
69  * @CDP_LITE_MON_LEVEL_PPDU: level ppdu
70  */
71 enum cdp_lite_mon_level {
72 	CDP_LITE_MON_LEVEL_INVALID = 0,
73 	CDP_LITE_MON_LEVEL_MSDU = 1,
74 	CDP_LITE_MON_LEVEL_MPDU = 2,
75 	CDP_LITE_MON_LEVEL_PPDU = 3,
76 };
77 
78 /**
79  * enum cdp_lite_mon_peer_action- lite mon peer action
80  * @CDP_LITE_MON_PEER_ADD: peer add
81  * @CDP_LITE_MON_PEER_REMOVE: peer remove
82  */
83 enum cdp_lite_mon_peer_action {
84 	CDP_LITE_MON_PEER_ADD = 0,
85 	CDP_LITE_MON_PEER_REMOVE = 1,
86 };
87 
88 /**
89  * enum cdp_lite_mon_direction - lite mon config direction
90  * @CDP_LITE_MON_DIRECTION_RX: lite mon config direction rx
91  * @CDP_LITE_MON_DIRECTION_TX: lite mon config direction tx
92  */
93 enum cdp_lite_mon_direction {
94 	CDP_LITE_MON_DIRECTION_RX = 1,
95 	CDP_LITE_MON_DIRECTION_TX = 2,
96 };
97 #endif
98 /* MU max user to sniff */
99 #define CDP_MU_SNIF_USER_MAX 4
100 /* EHT max type and compression mode */
101 #define CDP_EHT_TYPE_MODE_MAX 3
102 /* Same as MAX_20MHZ_SEGMENTS */
103 #define CDP_MAX_20MHZ_SEGS 16
104 /* Same as MAX_ANTENNA_EIGHT */
105 #define CDP_MAX_NUM_ANTENNA 8
106 
107 /* XXX not really a mode; there are really multiple PHY's */
108 enum cdp_mon_phymode {
109 	/* autoselect */
110 	CDP_IEEE80211_MODE_AUTO	= 0,
111 	/* 5GHz, OFDM */
112 	CDP_IEEE80211_MODE_11A	= 1,
113 	/* 2GHz, CCK */
114 	CDP_IEEE80211_MODE_11B	= 2,
115 	/* 2GHz, OFDM */
116 	CDP_IEEE80211_MODE_11G	= 3,
117 	/* 2GHz, GFSK */
118 	CDP_IEEE80211_MODE_FH	= 4,
119 	/* 5GHz, OFDM, 2x clock dynamic turbo */
120 	CDP_IEEE80211_MODE_TURBO_A	= 5,
121 	   /* 2GHz, OFDM, 2x clock dynamic turbo */
122 	CDP_IEEE80211_MODE_TURBO_G	= 6,
123 	/* 5Ghz, HT20 */
124 	CDP_IEEE80211_MODE_11NA_HT20	= 7,
125 	/* 2Ghz, HT20 */
126 	CDP_IEEE80211_MODE_11NG_HT20	= 8,
127 	/* 5Ghz, HT40 (ext ch +1) */
128 	CDP_IEEE80211_MODE_11NA_HT40PLUS	= 9,
129 	/* 5Ghz, HT40 (ext ch -1) */
130 	CDP_IEEE80211_MODE_11NA_HT40MINUS = 10,
131 	  /* 2Ghz, HT40 (ext ch +1) */
132 	CDP_IEEE80211_MODE_11NG_HT40PLUS = 11,
133 	/* 2Ghz, HT40 (ext ch -1) */
134 	CDP_IEEE80211_MODE_11NG_HT40MINUS = 12,
135 	/* 2Ghz, Auto HT40 */
136 	CDP_IEEE80211_MODE_11NG_HT40	= 13,
137 	/* 5Ghz, Auto HT40 */
138 	CDP_IEEE80211_MODE_11NA_HT40	= 14,
139 	/* 5Ghz, VHT20 */
140 	CDP_IEEE80211_MODE_11AC_VHT20	= 15,
141 	/* 5Ghz, VHT40 (Ext ch +1) */
142 	CDP_IEEE80211_MODE_11AC_VHT40PLUS   = 16,
143 	/* 5Ghz  VHT40 (Ext ch -1) */
144 	CDP_IEEE80211_MODE_11AC_VHT40MINUS  = 17,
145 	/* 5Ghz, VHT40 */
146 	CDP_IEEE80211_MODE_11AC_VHT40	= 18,
147 	/* 5Ghz, VHT80 */
148 	CDP_IEEE80211_MODE_11AC_VHT80	= 19,
149 	/* 5Ghz, VHT160 */
150 	CDP_IEEE80211_MODE_11AC_VHT160	= 20,
151 	/* 5Ghz, VHT80_80 */
152 	CDP_IEEE80211_MODE_11AC_VHT80_80	= 21,
153 };
154 
155 enum {
156 	CDP_PKT_TYPE_OFDM = 0,
157 	CDP_PKT_TYPE_CCK,
158 	CDP_PKT_TYPE_HT,
159 	CDP_PKT_TYPE_VHT,
160 	CDP_PKT_TYPE_HE,
161 	CDP_PKT_TYPE_EHT,
162 	CDP_PKT_TYPE_NO_SUP,
163 	CDP_PKT_TYPE_MAX,
164 };
165 
166 enum {
167 	CDP_SGI_0_8_US = 0,
168 	CDP_SGI_0_4_US,
169 	CDP_SGI_1_6_US,
170 	CDP_SGI_3_2_US,
171 };
172 
173 enum {
174 	CDP_RX_TYPE_SU = 0,
175 	CDP_RX_TYPE_MU_MIMO,
176 	CDP_RX_TYPE_MU_OFDMA,
177 	CDP_RX_TYPE_MU_OFDMA_MIMO,
178 	CDP_RX_TYPE_MAX,
179 };
180 
181 enum {
182 	CDP_MU_TYPE_DL = 0,
183 	CDP_MU_TYPE_UL,
184 	CDP_MU_TYPE_MAX,
185 };
186 
187 /*
188  *Band Width Types
189  */
190 enum CMN_BW_TYPES {
191 	CMN_BW_20MHZ,
192 	CMN_BW_40MHZ,
193 	CMN_BW_80MHZ,
194 	CMN_BW_160MHZ,
195 	CMN_BW_80_80MHZ,
196 #ifdef WLAN_FEATURE_11BE
197 	CMN_BW_320MHZ,
198 #endif
199 	CMN_BW_CNT,
200 	CMN_BW_IDLE = 0xFF, /*default BW state */
201 };
202 
203 enum cdp_punctured_modes {
204 	NO_PUNCTURE,
205 #ifdef WLAN_FEATURE_11BE
206 	PUNCTURED_20MHZ,
207 	PUNCTURED_40MHZ,
208 	PUNCTURED_80MHZ,
209 	PUNCTURED_120MHZ,
210 #endif
211 	PUNCTURED_MODE_CNT,
212 };
213 
214 struct cdp_mon_status {
215 	/* bss color value 1-63 used for update on ppdu_desc bsscolor */
216 	uint8_t bsscolor;
217 	int rs_numchains;
218 	int rs_flags;
219 #define IEEE80211_RX_FCS_ERROR      0x01
220 #define IEEE80211_RX_MIC_ERROR      0x02
221 #define IEEE80211_RX_DECRYPT_ERROR  0x04
222 /* holes in flags here between, ATH_RX_XXXX to IEEE80211_RX_XXX */
223 #define IEEE80211_RX_KEYMISS        0x200
224 #define IEEE80211_RX_PN_ERROR       0x400
225 	int rs_rssi;       /* RSSI (noise floor adjusted) */
226 	int rs_abs_rssi;   /* absolute RSSI */
227 	int rs_datarate;   /* data rate received */
228 	int rs_rateieee;
229 	int rs_ratephy1;
230 	int rs_ratephy2;
231 	int rs_ratephy3;
232 
233 /* Keep the same as ATH_MAX_ANTENNA */
234 #define IEEE80211_MAX_ANTENNA       3
235 	/* RSSI (noise floor adjusted) */
236 	u_int8_t    rs_rssictl[IEEE80211_MAX_ANTENNA];
237 	/* RSSI (noise floor adjusted) */
238 	u_int8_t    rs_rssiextn[IEEE80211_MAX_ANTENNA];
239 	/* rs_rssi is valid or not */
240 	u_int8_t    rs_isvalidrssi;
241 
242 	enum cdp_mon_phymode rs_phymode;
243 	int         rs_freq;
244 
245 	union {
246 		u_int8_t            data[8];
247 		u_int64_t           tsf;
248 	} rs_tstamp;
249 
250 	/*
251 	 * Detail channel structure of recv frame.
252 	 * It could be NULL if not available
253 	 */
254 
255 
256 #ifdef ATH_SUPPORT_AOW
257 	u_int16_t   rs_rxseq;      /* WLAN Sequence number */
258 #endif
259 #ifdef ATH_VOW_EXT_STATS
260 	/* Lower 16 bits holds the udp checksum offset in the data pkt */
261 	u_int32_t vow_extstats_offset;
262 	/* Higher 16 bits contains offset in the data pkt at which vow
263 	 * ext stats are embedded
264 	 */
265 #endif
266 	u_int8_t rs_isaggr;
267 	u_int8_t rs_isapsd;
268 	int16_t rs_noisefloor;
269 	u_int16_t  rs_channel;
270 #ifdef ATH_SUPPORT_TxBF
271 	u_int32_t   rs_rpttstamp;   /* txbf report time stamp*/
272 #endif
273 
274 	/* The following counts are meant to assist in stats calculation.
275 	 * These variables are incremented only in specific situations, and
276 	 * should not be relied upon for any purpose other than the original
277 	 * stats related purpose they have been introduced for.
278 	*/
279 
280 	u_int16_t   rs_cryptodecapcount; /* Crypto bytes decapped/demic'ed. */
281 	u_int8_t    rs_padspace;         /* No. of padding bytes present after
282 					  header in wbuf. */
283 	u_int8_t    rs_qosdecapcount;    /* QoS/HTC bytes decapped. */
284 
285 	/* End of stats calculation related counts. */
286 
287 	/*
288 	 * uint8_t     rs_lsig[IEEE80211_LSIG_LEN];
289 	 * uint8_t     rs_htsig[IEEE80211_HTSIG_LEN];
290 	 * uint8_t     rs_servicebytes[IEEE80211_SB_LEN];
291 	 * uint8_t     rs_fcs_error;
292 	*/
293 
294 	/* cdp convergence monitor mode status */
295 	union {
296 		u_int8_t            cdp_data[8];
297 		u_int64_t           cdp_tsf;
298 	} cdp_rs_tstamp;
299 
300 	uint8_t  cdp_rs_pream_type;
301 	uint32_t cdp_rs_user_rssi;
302 	uint8_t  cdp_rs_stbc;
303 	uint8_t  cdp_rs_sgi;
304 	uint32_t cdf_rs_rate_mcs;
305 	uint32_t cdp_rs_reception_type;
306 	uint32_t cdp_rs_bw;
307 	uint32_t cdp_rs_nss;
308 	uint8_t  cdp_rs_fcs_err;
309 	bool     cdp_rs_rxdma_err;
310 };
311 
312 enum {
313 	CDP_MON_PPDU_START = 0,
314 	CDP_MON_PPDU_END,
315 };
316 
317 #ifdef QCA_UNDECODED_METADATA_SUPPORT
318 /*
319  * enum cdp_mon_phyrx_abort_reason_code: Phy err code to store the reason
320  * why PHY generated an abort request.
321  */
322 enum cdp_mon_phyrx_abort_reason_code {
323 	CDP_PHYRX_ERR_PHY_OFF = 0,
324 	CDP_PHYRX_ERR_SYNTH_OFF,
325 	CDP_PHYRX_ERR_OFDMA_TIMING,
326 	CDP_PHYRX_ERR_OFDMA_SIGNAL_PARITY,
327 	CDP_PHYRX_ERR_OFDMA_RATE_ILLEGAL,
328 	CDP_PHYRX_ERR_OFDMA_LENGTH_ILLEGAL,
329 	CDP_PHYRX_ERR_OFDMA_RESTART,
330 	CDP_PHYRX_ERR_OFDMA_SERVICE,
331 	CDP_PHYRX_ERR_PPDU_OFDMA_POWER_DROP,
332 	CDP_PHYRX_ERR_CCK_BLOKKER,
333 	CDP_PHYRX_ERR_CCK_TIMING = 10,
334 	CDP_PHYRX_ERR_CCK_HEADER_CRC,
335 	CDP_PHYRX_ERR_CCK_RATE_ILLEGAL,
336 	CDP_PHYRX_ERR_CCK_LENGTH_ILLEGAL,
337 	CDP_PHYRX_ERR_CCK_RESTART,
338 	CDP_PHYRX_ERR_CCK_SERVICE,
339 	CDP_PHYRX_ERR_CCK_POWER_DROP,
340 	CDP_PHYRX_ERR_HT_CRC_ERR,
341 	CDP_PHYRX_ERR_HT_LENGTH_ILLEGAL,
342 	CDP_PHYRX_ERR_HT_RATE_ILLEGAL,
343 	CDP_PHYRX_ERR_HT_ZLF = 20,
344 	CDP_PHYRX_ERR_FALSE_RADAR_EXT,
345 	CDP_PHYRX_ERR_GREEN_FIELD,
346 	CDP_PHYRX_ERR_BW_GT_DYN_BW,
347 	CDP_PHYRX_ERR_HT_LSIG_RATE_MISMATCH,
348 	CDP_PHYRX_ERR_VHT_CRC_ERROR,
349 	CDP_PHYRX_ERR_VHT_SIGA_UNSUPPORTED,
350 	CDP_PHYRX_ERR_VHT_LSIG_LEN_INVALID,
351 	CDP_PHYRX_ERR_VHT_NDP_OR_ZLF,
352 	CDP_PHYRX_ERR_VHT_NSYM_LT_ZERO,
353 	CDP_PHYRX_ERR_VHT_RX_EXTRA_SYMBOL_MISMATCH = 30,
354 	CDP_PHYRX_ERR_VHT_RX_SKIP_GROUP_ID0,
355 	CDP_PHYRX_ERR_VHT_RX_SKIP_GROUP_ID1TO62,
356 	CDP_PHYRX_ERR_VHT_RX_SKIP_GROUP_ID63,
357 	CDP_PHYRX_ERR_OFDM_LDPC_DECODER_DISABLED,
358 	CDP_PHYRX_ERR_DEFER_NAP,
359 	CDP_PHYRX_ERR_FDOMAIN_TIMEOUT,
360 	CDP_PHYRX_ERR_LSIG_REL_CHECK,
361 	CDP_PHYRX_ERR_BT_COLLISION,
362 	CDP_PHYRX_ERR_UNSUPPORTED_MU_FEEDBACK,
363 	CDP_PHYRX_ERR_PPDU_TX_INTERRUPT_RX = 40,
364 	CDP_PHYRX_ERR_UNSUPPORTED_CBF,
365 	CDP_PHYRX_ERR_OTHER,
366 	CDP_PHYRX_ERR_HE_SIGA_UNSUPPORTED,
367 	CDP_PHYRX_ERR_HE_SIGA_CRC_ERROR,
368 	CDP_PHYRX_ERR_HE_SIGB_UNSUPPORTED,
369 	CDP_PHYRX_ERR_HE_SIGB_CRC_ERROR,
370 	CDP_PHYRX_ERR_HE_MU_MODE_UNSUPPORTED,
371 	CDP_PHYRX_ERR_HE_NDP_OR_ZLF,
372 	CDP_PHYRX_ERR_HE_NSYM_LT_ZERO,
373 	CDP_PHYRX_ERR_HE_RU_PARAMS_UNSUPPORTED = 50,
374 	CDP_PHYRX_ERR_HE_NUM_USERS_UNSUPPORTED,
375 	CDP_PHYRX_ERR_HE_SOUNDING_PARAMS_UNSUPPORTED,
376 	CDP_PHYRX_ERR_HE_EXT_SU_UNSUPPORTED,
377 	CDP_PHYRX_ERR_HE_TRIG_UNSUPPORTED,
378 	CDP_PHYRX_ERR_HE_LSIG_LEN_INVALID = 55,
379 	CDP_PHYRX_ERR_HE_LSIG_RATE_MISMATCH,
380 	CDP_PHYRX_ERR_OFDMA_SIGNAL_RELIABILITY,
381 	CDP_PHYRX_ERR_HT_NSYM_LT_ZERO,
382 	CDP_PHYRX_ERR_VHT_LSIG_RATE_MISMATCH,
383 	CDP_PHYRX_ERR_VHT_PAID_GID_MISMATCH = 60,
384 	CDP_PHYRX_ERR_VHT_UNSUPPORTED_BW,
385 	CDP_PHYRX_ERR_VHT_GI_DISAM_MISMATCH,
386 	CDP_PHYRX_ERR_RX_WDG_TIMEOUT = 63,
387 	CDP_PHYRX_ERR_MAX
388 };
389 #endif
390 
391 #define MAX_PPDU_ID_HIST 128
392 
393 /**
394  * struct cdp_pdev_mon_stats
395  * @status_ppdu_state: state on PPDU start and end
396  * @status_ppdu_start: status ring PPDU start TLV count
397  * @status_ppdu_end: status ring PPDU end TLV count
398  * @status_ppdu_compl: status ring matching start and end count on PPDU
399  * @status_ppdu_start_mis: status ring missing start TLV count on PPDU
400  * @status_ppdu_end_mis: status ring missing end TLV count on PPDU
401  * @mpdu_cnt_fcs_ok: MPDU ok count per pkt and reception type DL-UL and user
402  * @mpdu_cnt_fcs_err: MPDU err count per pkt and reception type DL-UL and user
403  * @ppdu_eht_type_mode: PPDU count per type compression mode and DL-UL
404  * @end_user_stats_cnt: PPDU end user TLV count
405  * @start_user_info_cnt: PPDU start user info TLV count
406  * @status_ppdu_done: status ring PPDU done TLV count
407  * @dest_ppdu_done: destination ring PPDU count
408  * @dest_mpdu_done: destination ring MPDU count
409  * @dest_mpdu_drop:
410  * @dup_mon_linkdesc_cnt: duplicate link descriptor indications from HW
411  * @dup_mon_buf_cnt: duplicate buffer indications from HW
412  * @dup_mon_sw_desc: Duplicate sw desc from HW
413  * @stat_ring_ppdu_id_hist:
414  * @dest_ring_ppdu_id_hist:
415  * @ppdu_id_hist_idx:
416  * @mon_rx_dest_stuck:
417  * @tlv_tag_status_err: status not correct in the tlv tag
418  * @status_buf_done_war: Number of status ring buffers for which DMA not done
419  *  WAR is applied.
420  * @mon_rx_bufs_replenished_dest: Rx buffers replenish count
421  * @mon_rx_bufs_reaped_dest: Rx buffer reap count
422  * @ppdu_id_mismatch: counter to track ppdu id mismatch in
423  *  mointor status and monitor destination ring
424  * @ppdu_id_match: counter to track ppdu id match in
425  *  mointor status and monitor destination ring
426  * @status_ppdu_drop: Number of ppdu dropped from monitor status ring
427  * @dest_ppdu_drop: Number of ppdu dropped from monitor destination ring
428  * @mon_link_desc_invalid: msdu link desc invalid count
429  * @mon_rx_desc_invalid: rx_desc invalid count
430  * @mon_nbuf_sanity_err:
431  * @mpdu_ppdu_id_mismatch_drop: mpdu's ppdu id did not match destination
432  *  ring ppdu id
433  * @mpdu_decap_type_invalid: mpdu decap type invalid count
434  * @rx_undecoded_count: Received undecoded frame count
435  * @rx_undecoded_error: Rx undecoded errors
436  * @rx_hdr_not_received: Rx HDR not received for MPDU
437  * @invalid_dma_length: Invalid length received for packet buffer
438  * @parent_buf_alloc: Numder of parent nbuf allocated for MPDU
439  * @parent_buf_free: Number of parent nbuf freed
440  * @pkt_buf_count: Number of packet buffers received
441  * @mpdus_buf_to_stack: Number of MPDUs delivered to stack
442  * @status_buf_count: Number of status buffer received
443  * @empty_desc_ppdu: Number of empty desc received
444  * @total_ppdu_info_enq: Number of PPDUs enqueued to wq
445  * @total_ppdu_info_drop: Number of PPDUs dropped
446  * @total_ppdu_info_alloc: Number of PPDU info allocated
447  * @total_ppdu_info_free: Number of PPDU info freed
448  * @ppdu_drop_cnt: Total PPDU drop count
449  * @mpdu_drop_cnt: Total MPDU drop count
450  * @end_of_ppdu_drop_cnt: Total end of ppdu drop count
451  * @tlv_drop_cnt: TLV drop count
452  * @rx_hdr_invalid_cnt: Rx header invalid count
453  * @null_status_desc: NULL packet desc count
454  * @null_pkt_desc: NULL packet desc count
455  * @desc_magic_mismatch: desc magic number mismatch count;
456  * @null_pkt_addr: NULL packet address count;
457  * @pending_desc_count: Pending desc_count during pdev deinit
458  */
459 struct cdp_pdev_mon_stats {
460 #ifndef REMOVE_MON_DBG_STATS
461 	uint32_t status_ppdu_state;
462 	uint32_t status_ppdu_start;
463 	uint32_t status_ppdu_end;
464 	uint32_t status_ppdu_compl;
465 	uint32_t status_ppdu_start_mis;
466 	uint32_t status_ppdu_end_mis;
467 #endif
468 	uint32_t mpdu_cnt_fcs_ok[CDP_PKT_TYPE_MAX][CDP_RX_TYPE_MAX]
469 				[CDP_MU_TYPE_MAX][CDP_MU_SNIF_USER_MAX];
470 	uint32_t mpdu_cnt_fcs_err[CDP_PKT_TYPE_MAX][CDP_RX_TYPE_MAX]
471 				 [CDP_MU_TYPE_MAX][CDP_MU_SNIF_USER_MAX];
472 	uint32_t ppdu_eht_type_mode[CDP_EHT_TYPE_MODE_MAX][CDP_MU_TYPE_MAX];
473 	uint32_t end_user_stats_cnt;
474 	uint32_t start_user_info_cnt;
475 	uint32_t status_ppdu_done;
476 	uint32_t dest_ppdu_done;
477 	uint32_t dest_mpdu_done;
478 	uint32_t dest_mpdu_drop;
479 	uint32_t dup_mon_linkdesc_cnt;
480 	uint32_t dup_mon_buf_cnt;
481 	uint32_t dup_mon_sw_desc;
482 	uint32_t stat_ring_ppdu_id_hist[MAX_PPDU_ID_HIST];
483 	uint32_t dest_ring_ppdu_id_hist[MAX_PPDU_ID_HIST];
484 	uint32_t ppdu_id_hist_idx;
485 	uint32_t mon_rx_dest_stuck;
486 	uint32_t tlv_tag_status_err;
487 	uint32_t status_buf_done_war;
488 	uint32_t mon_rx_bufs_replenished_dest;
489 	uint32_t mon_rx_bufs_reaped_dest;
490 	uint32_t ppdu_id_mismatch;
491 	uint32_t ppdu_id_match;
492 	uint32_t status_ppdu_drop;
493 	uint32_t dest_ppdu_drop;
494 	uint32_t mon_link_desc_invalid;
495 	uint32_t mon_rx_desc_invalid;
496 	uint32_t mon_nbuf_sanity_err;
497 	uint32_t mpdu_ppdu_id_mismatch_drop;
498 	uint32_t mpdu_decap_type_invalid;
499 #ifdef QCA_UNDECODED_METADATA_SUPPORT
500 	uint32_t rx_undecoded_count;
501 	uint32_t rx_undecoded_error[CDP_PHYRX_ERR_MAX];
502 #endif
503 	uint32_t rx_hdr_not_received;
504 	uint32_t invalid_dma_length;
505 	uint32_t parent_buf_alloc;
506 	uint32_t parent_buf_free;
507 	uint32_t pkt_buf_count;
508 	uint32_t mpdus_buf_to_stack;
509 	uint32_t status_buf_count;
510 	uint32_t empty_desc_ppdu;
511 	uint32_t total_ppdu_info_enq;
512 	uint32_t total_ppdu_info_drop;
513 	uint32_t total_ppdu_info_alloc;
514 	uint32_t total_ppdu_info_free;
515 	uint32_t ppdu_drop_cnt;
516 	uint32_t mpdu_drop_cnt;
517 	uint32_t end_of_ppdu_drop_cnt;
518 	uint32_t tlv_drop_cnt;
519 	uint32_t rx_hdr_invalid_cnt;
520 	uint32_t null_status_desc;
521 	uint32_t null_pkt_desc;
522 	uint32_t desc_magic_mismatch;
523 	uint32_t null_pkt_addr;
524 	uint32_t pending_desc_count;
525 };
526 
527 #ifdef QCA_SUPPORT_LITE_MONITOR
528 /**
529  * struct cdp_lite_mon_filter_config - lite mon set/get filter config
530  * @direction: direction tx/rx
531  * @disable: disables lite mon
532  * @level: MSDU/MPDU/PPDU levels
533  * @metadata: meta information to be added
534  * @mgmt_filter: mgmt filter for modes fp,md,mo
535  * @ctrl_filter: ctrl filter for modes fp,md,mo
536  * @data_filter: data filter for modes fp,md,mo
537  * @len: mgmt/ctrl/data frame lens
538  * @debug: debug options
539  * @vdev_id: output vdev id
540  * @legacy_filter_enabled: legacy filter currently enabled
541  */
542 struct cdp_lite_mon_filter_config {
543 	uint8_t direction;
544 	uint8_t disable;
545 	uint8_t level;
546 	uint8_t metadata;
547 	uint16_t mgmt_filter[CDP_MON_FRM_FILTER_MODE_MAX];
548 	uint16_t ctrl_filter[CDP_MON_FRM_FILTER_MODE_MAX];
549 	uint16_t data_filter[CDP_MON_FRM_FILTER_MODE_MAX];
550 	uint16_t len[CDP_MON_FRM_TYPE_MAX];
551 	uint8_t debug;
552 	uint8_t vdev_id;
553 	uint8_t legacy_filter_enabled;
554 };
555 
556 /**
557  * struct cdp_lite_mon_peer_config - lite mon set peer config
558  * @direction: direction tx/rx
559  * @action: add/del
560  * @vdev_id: peer vdev id
561  * @mac: peer mac
562  */
563 struct cdp_lite_mon_peer_config {
564 	uint8_t direction;
565 	uint8_t action;
566 	uint8_t vdev_id;
567 	uint8_t mac[QDF_MAC_ADDR_SIZE];
568 };
569 
570 /**
571  * struct cdp_lite_mon_peer_info - lite mon get peer config
572  * @direction: direction tx/rx
573  * @count: no of peers
574  * @mac: peer macs
575  */
576 struct cdp_lite_mon_peer_info {
577 	uint8_t direction;
578 	uint8_t count;
579 	uint8_t mac[CDP_LITE_MON_PEER_MAX][QDF_MAC_ADDR_SIZE];
580 };
581 #endif
582 /* channel operating width */
583 enum cdp_channel_width {
584 	CHAN_WIDTH_20 = 0,
585 	CHAN_WIDTH_40,
586 	CHAN_WIDTH_80,
587 	CHAN_WIDTH_160,
588 	CHAN_WIDTH_80P80,
589 	CHAN_WIDTH_5,
590 	CHAN_WIDTH_10,
591 	CHAN_WIDTH_165,
592 	CHAN_WIDTH_160P160,
593 	CHAN_WIDTH_320,
594 
595 	CHAN_WIDTH_MAX,
596 };
597 
598 /**
599  * struct cdp_rssi_temp_off_param_dp
600  * @rssi_temp_offset: Temperature based rssi offset , send every 30 secs
601  */
602 
603 struct cdp_rssi_temp_off_param_dp {
604 	int32_t rssi_temp_offset;
605 };
606 
607 /**
608  * struct cdp_rssi_dbm_conv_param_dp
609  * @curr_bw: Current bandwidth
610  * @curr_rx_chainmask: Current rx chainmask
611  * @xbar_config: 4 bytes, used for BB to RF Chain mapping
612  * @xlna_bypass_offset: Low noise amplifier bypass offset
613  * @xlna_bypass_threshold: Low noise amplifier bypass threshold
614  * @nf_hw_dbm: HW noise floor in dBm per chain, per 20MHz subband
615  */
616 struct cdp_rssi_dbm_conv_param_dp {
617 	uint32_t curr_bw;
618 	uint32_t curr_rx_chainmask;
619 	uint32_t xbar_config;
620 	int32_t xlna_bypass_offset;
621 	int32_t xlna_bypass_threshold;
622 	int8_t nf_hw_dbm[CDP_MAX_NUM_ANTENNA][CDP_MAX_20MHZ_SEGS];
623 };
624 
625 /**
626  * struct cdp_rssi_db2dbm_param_dp
627  * @pdev_id: pdev_id
628  * @rssi_temp_off_present: to check temp offset values present or not
629  * @rssi_dbm_info_present: to check rssi dbm conversion parameters
630  *						   present or not
631  * @temp_off_param: cdp_rssi_temp_off_param_dp structure value
632  * @rssi_dbm_param: cdp_rssi_dbm_conv_param_dp staructure value
633  */
634 struct cdp_rssi_db2dbm_param_dp {
635 	uint32_t pdev_id;
636 	bool rssi_temp_off_present;
637 	bool rssi_dbm_info_present;
638 	struct cdp_rssi_temp_off_param_dp temp_off_param;
639 	struct cdp_rssi_dbm_conv_param_dp rssi_dbm_param;
640 };
641 
642 /**
643  * enum cdp_mon_reap_source - trigger source of the reap timer of
644  * monitor status ring
645  * @CDP_MON_REAP_SOURCE_PKTLOG: pktlog
646  * @CDP_MON_REAP_SOURCE_CFR: CFR
647  * @CDP_MON_REAP_SOURCE_EMESH: easy mesh
648  * @CDP_MON_REAP_SOURCE_NUM: total number of the sources
649  * @CDP_MON_REAP_SOURCE_ANY: any of the sources
650  */
651 enum cdp_mon_reap_source {
652 	CDP_MON_REAP_SOURCE_PKTLOG,
653 	CDP_MON_REAP_SOURCE_CFR,
654 	CDP_MON_REAP_SOURCE_EMESH,
655 
656 	/* keep last */
657 	CDP_MON_REAP_SOURCE_NUM,
658 	CDP_MON_REAP_SOURCE_ANY,
659 };
660 #endif
661