| /linux-6.12.1/drivers/gpu/drm/xe/ |
| D | xe_mmio.h | 12 struct xe_reg;
17 u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg);
18 u16 xe_mmio_read16(struct xe_gt *gt, struct xe_reg reg);
19 void xe_mmio_write32(struct xe_gt *gt, struct xe_reg reg, u32 val);
20 u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg);
21 u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, u32 set);
22 int xe_mmio_write32_and_verify(struct xe_gt *gt, struct xe_reg reg, u32 val, u32 mask, u32 eval);
23 bool xe_mmio_in_range(const struct xe_gt *gt, const struct xe_mmio_range *range, struct xe_reg reg);
25 u64 xe_mmio_read64_2x32(struct xe_gt *gt, struct xe_reg reg);
26 int xe_mmio_wait32(struct xe_gt *gt, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us,
[all …]
|
| D | xe_oa_types.h | 81 struct xe_reg oa_head_ptr;
82 struct xe_reg oa_tail_ptr;
83 struct xe_reg oa_buffer;
84 struct xe_reg oa_ctx_ctrl;
85 struct xe_reg oa_ctrl;
86 struct xe_reg oa_debug;
87 struct xe_reg oa_status;
|
| D | xe_mmio.c | 195 u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg) in xe_mmio_read8()
210 u16 xe_mmio_read16(struct xe_gt *gt, struct xe_reg reg) in xe_mmio_read16()
225 void xe_mmio_write32(struct xe_gt *gt, struct xe_reg reg, u32 val) in xe_mmio_write32()
238 u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg) in xe_mmio_read32()
257 u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, u32 set) in xe_mmio_rmw32()
269 struct xe_reg reg, u32 val, u32 mask, u32 eval) in xe_mmio_write32_and_verify()
281 struct xe_reg reg) in xe_mmio_in_range()
310 u64 xe_mmio_read64_2x32(struct xe_gt *gt, struct xe_reg reg) in xe_mmio_read64_2x32()
312 struct xe_reg reg_udw = { .addr = reg.addr + 0x4 }; in xe_mmio_read64_2x32()
338 static int __xe_mmio_wait32(struct xe_gt *gt, struct xe_reg reg, u32 mask, u32 val, u32 timeout_us, in __xe_mmio_wait32()
[all …]
|
| D | xe_gt_sriov_vf.h | 13 struct xe_reg;
24 u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg);
25 void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val);
|
| D | xe_gt_sriov_pf_service.c | 108 static const struct xe_reg tgl_runtime_regs[] = {
120 static const struct xe_reg ats_m_runtime_regs[] = {
133 static const struct xe_reg pvc_runtime_regs[] = {
146 static const struct xe_reg ver_1270_runtime_regs[] = {
161 static const struct xe_reg ver_2000_runtime_regs[] = {
179 static const struct xe_reg *pick_runtime_regs(struct xe_device *xe, unsigned int *count) in pick_runtime_regs()
181 const struct xe_reg *regs; in pick_runtime_regs()
209 const struct xe_reg *regs; in pf_alloc_runtime_info()
237 const struct xe_reg *regs, u32 *values) in read_many()
245 const struct xe_reg *regs; in pf_prepare_runtime_info()
[all …]
|
| D | xe_gt_sriov_pf_service_types.h | 11 struct xe_reg;
32 const struct xe_reg *regs;
|
| D | xe_force_wake_types.h | 61 struct xe_reg reg_ctl;
63 struct xe_reg reg_ack;
|
| D | xe_hw_engine.h | 81 void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe, struct xe_reg reg, u32 val);
82 u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg);
|
| D | xe_gt_mcr.c | 51 static inline struct xe_reg to_xe_reg(struct xe_reg_mcr reg_mcr) in to_xe_reg()
528 const struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_get_nonterminated_steering()
605 const struct xe_reg reg = to_xe_reg(reg_mcr); in rw_with_mcr_steering()
606 struct xe_reg steer_reg; in rw_with_mcr_steering()
671 const struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_unicast_read_any()
750 struct xe_reg reg = to_xe_reg(reg_mcr); in xe_gt_mcr_multicast_write()
|
| D | xe_reg_sr_types.h | 15 struct xe_reg reg;
|
| D | xe_guc_types.h | 94 struct xe_reg notify_reg;
|
| D | xe_hwmon.c | 81 static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg hwmon_reg, in xe_hwmon_get_reg()
151 struct xe_reg rapl_limit, pkg_power_sku; in xe_hwmon_power_max_read()
196 struct xe_reg rapl_limit; in xe_hwmon_power_max_write()
226 struct xe_reg reg = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel); in xe_hwmon_power_rated_max_read()
789 struct xe_reg pkg_power_sku_unit; in xe_hwmon_get_preregistration_info()
|
| D | xe_force_wake.c | 26 struct xe_reg reg, struct xe_reg ack) in domain_init()
|
| D | xe_rtp_types.h | 24 struct xe_reg reg;
|
| D | xe_reg_sr.c | 143 static struct xe_reg_mcr to_xe_reg_mcr(const struct xe_reg reg) in to_xe_reg_mcr()
150 struct xe_reg reg = entry->reg; in apply_one_mmio()
|
| D | xe_gt_topology.c | 28 fuse_val[i] = xe_mmio_read32(gt, va_arg(argp, struct xe_reg)); in load_dss_mask()
|
| D | xe_query.c | 87 struct xe_reg lower_reg, in __read_timestamps()
88 struct xe_reg upper_reg, in __read_timestamps()
|
| D | xe_huc.c | 217 struct xe_reg reg;
|
| D | xe_gt.c | 200 static struct xe_reg_mcr to_xe_reg_mcr(const struct xe_reg reg) in to_xe_reg_mcr()
235 struct xe_reg reg = entry->reg; in emit_wa_job()
|
| D | xe_guc_ads.c | 557 struct xe_reg reg, in guc_mmio_regset_write_one()
580 struct xe_reg reg; in guc_mmio_regset_write()
|
| D | xe_oa.c | 45 struct xe_reg addr;
67 struct xe_reg reg;
366 struct xe_reg oaheadptr = __oa_regs(stream)->oa_head_ptr; in xe_oa_append_reports()
1331 struct xe_reg reg = OACTXCONTROL(stream->hwe->mmio_base); in xe_oa_set_ctx_ctrl_offset()
1890 static const struct xe_reg flex_eu_regs[] = { in xe_oa_is_valid_flex_addr()
|
| D | xe_gt_sriov_vf.c | 882 u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg) in xe_gt_sriov_vf_read32()
918 void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val) in xe_gt_sriov_vf_write32()
|
| /linux-6.12.1/drivers/gpu/drm/xe/compat-i915-headers/ |
| D | intel_uncore.h | 30 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read()
38 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read8()
46 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_read16()
55 struct xe_reg lower_reg = XE_REG(i915_mmio_reg_offset(i915_lower_reg)); in intel_uncore_read64_2x32()
56 struct xe_reg upper_reg = XE_REG(i915_mmio_reg_offset(i915_upper_reg)); in intel_uncore_read64_2x32()
73 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_posting_read()
81 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_write()
89 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_uncore_rmw()
98 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_wait_for_register()
108 struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); in intel_wait_for_register_fw()
[all …]
|
| /linux-6.12.1/drivers/gpu/drm/xe/regs/ |
| D | xe_reg_defs.h | 20 struct xe_reg { struct
53 static_assert(sizeof(struct xe_reg) == sizeof(u32));
64 struct xe_reg __reg;
112 #define XE_REG(r_, ...) ((const struct xe_reg)XE_REG_INITIALIZER(r_, ##__VA_ARGS__))
122 ((const struct xe_reg)XE_REG_INITIALIZER(r_, ##__VA_ARGS__, .ext = 1))
134 static inline bool xe_reg_is_valid(struct xe_reg r) in xe_reg_is_valid()
|
| /linux-6.12.1/drivers/gpu/drm/xe/tests/ |
| D | xe_rtp_test.c | 36 struct xe_reg expected_reg;
|