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Searched refs:xe_bo_ggtt_addr (Results 1 – 21 of 21) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_guc_ads.c381 addr_ggtt = xe_bo_ggtt_addr(ads->bo) + offset; in guc_waklv_init()
502 xe_bo_ggtt_addr(ads->bo) + in guc_prep_golden_lrc_null()
542 u32 addr = xe_bo_ggtt_addr(ads->bo) + guc_ads_capture_offset(ads); in guc_capture_list_init()
621 u32 addr = xe_bo_ggtt_addr(ads->bo) + regset_offset; in guc_mmio_reg_state_init()
664 base_ggtt = xe_bo_ggtt_addr(ads->bo) + um_queue_offset; in guc_um_init_params()
707 u32 base = xe_bo_ggtt_addr(ads->bo); in xe_guc_ads_populate_minimal()
731 u32 base = xe_bo_ggtt_addr(ads->bo); in xe_guc_ads_populate()
770 addr_ggtt = xe_bo_ggtt_addr(ads->bo) + offset; in guc_populate_golden_lrc()
866 ret = guc_ads_action_update_policies(ads, xe_bo_ggtt_addr(bo)); in xe_guc_ads_scheduler_policy_toggle_reset()
Dxe_huc.c168 ggtt_offset = xe_bo_ggtt_addr(pkt); in huc_auth_via_gsccs()
173 xe_bo_ggtt_addr(huc->fw.bo), in huc_auth_via_gsccs()
255 ret = xe_guc_auth_huc(guc, xe_bo_ggtt_addr(huc->fw.bo) + in xe_huc_auth()
Dxe_memirq.c223 return xe_bo_ggtt_addr(memirq->bo) + XE_MEMIRQ_SOURCE_OFFSET; in xe_memirq_source_ptr()
241 return xe_bo_ggtt_addr(memirq->bo) + XE_MEMIRQ_STATUS_OFFSET; in xe_memirq_status_ptr()
259 return xe_bo_ggtt_addr(memirq->bo) + XE_MEMIRQ_ENABLE_OFFSET; in xe_memirq_enable_ptr()
Dxe_ttm_stolen_mgr.c263 return mgr->io_base + xe_bo_ggtt_addr(bo) + offset; in xe_ttm_stolen_io_offset()
307 mem->bus.offset = xe_bo_ggtt_addr(bo) + mgr->io_base; in __xe_ttm_stolen_io_mem_reserve_stolen()
Dxe_sa.c62 sa_manager->gpu_addr = xe_bo_ggtt_addr(bo); in xe_sa_bo_manager_init()
Dxe_guc_hwconfig.c43 int ret = send_get_hwconfig(guc, xe_bo_ggtt_addr(guc->hwconfig.bo), in guc_hwconfig_copy()
Dxe_gsc.c71 u64 offset = xe_bo_ggtt_addr(gsc->private); in emit_gsc_upload()
145 ggtt_offset = xe_bo_ggtt_addr(bo); in query_compatibility_version()
Dxe_guc_ct.c264 desc_addr = xe_bo_ggtt_addr(ct->bo); in guc_ct_ctb_h2g_register()
265 ctb_addr = xe_bo_ggtt_addr(ct->bo) + CTB_DESC_SIZE * 2; in guc_ct_ctb_h2g_register()
291 desc_addr = xe_bo_ggtt_addr(ct->bo) + CTB_DESC_SIZE; in guc_ct_ctb_g2h_register()
292 ctb_addr = xe_bo_ggtt_addr(ct->bo) + CTB_DESC_SIZE * 2 + in guc_ct_ctb_g2h_register()
Dxe_guc_pc.c142 xe_bo_ggtt_addr(pc->bo), in pc_action_reset()
161 xe_bo_ggtt_addr(pc->bo), in pc_action_query_task_state()
Dxe_bo.h191 xe_bo_ggtt_addr(struct xe_bo *bo) in xe_bo_ggtt_addr() function
Dxe_gt_sriov_pf_policy.c56 ret = guc_action_update_vgt_policy(guc, xe_bo_ggtt_addr(bo), num_dwords); in pf_send_policy_klvs()
Dxe_guc.c45 u32 addr = xe_bo_ggtt_addr(bo); in guc_bo_ggtt_addr()
495 u32 rsa_ggtt_addr = xe_bo_ggtt_addr(guc->fw.bo) + in guc_xfer_rsa()
Dxe_execlist.c80 xe_bo_ggtt_addr(hwe->hwsp)); in __start_lrc()
Dxe_gsc_proxy.c122 u64 addr_in = xe_bo_ggtt_addr(gsc->proxy.bo); in proxy_send_to_gsc()
Dxe_oa.c216 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_buffer_check_unlocked()
325 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_append_reports()
380 u32 gtt_offset = xe_bo_ggtt_addr(stream->oa_buffer.bo); in xe_oa_init_oa_buffer()
645 u32 offset = xe_bo_ggtt_addr(lrc->bo); in xe_oa_store_flex()
Dxe_uc_fw.c802 return xe_bo_ggtt_addr(uc_fw->bo); in uc_fw_ggtt_offset()
Dxe_hw_engine.c332 xe_bo_ggtt_addr(hwe->hwsp)); in xe_hw_engine_enable_ring()
Dxe_lrc.c729 return xe_bo_ggtt_addr(lrc->bo) + __xe_lrc_##elem##_offset(lrc); \
Dxe_gt_sriov_pf_config.c92 ret = guc_action_update_vf_cfg(guc, vfid, xe_bo_ggtt_addr(bo), num_dwords); in pf_send_vf_cfg_klvs()
/linux-6.12.1/drivers/gpu/drm/xe/display/
Dxe_dsb_buffer.c15 return xe_bo_ggtt_addr(dsb_buf->vma->bo); in intel_dsb_buffer_ggtt_offset()
Dxe_hdcp_gsc.c88 cmd_in = xe_bo_ggtt_addr(bo); in intel_hdcp_gsc_initialize_message()