/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
D | dcn301_fpu.c | 294 struct dcn_watermarks *wm_set, in calculate_wm_set_for_vlevel() argument 311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 312 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel() 313 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 314 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 315 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 316 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 317 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 318 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
D | dcn316_clk_mgr.c | 402 struct dcn316_watermarks *table = clk_mgr_dcn316->smu_wm_set.wm_set; in dcn316_notify_wm_ranges() 595 clk_mgr->smu_wm_set.wm_set = (struct dcn316_watermarks *)dm_helpers_allocate_gpu_mem( in dcn316_clk_mgr_construct() 601 if (!clk_mgr->smu_wm_set.wm_set) { in dcn316_clk_mgr_construct() 602 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn316_clk_mgr_construct() 605 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn316_clk_mgr_construct() 672 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn316_clk_mgr_destroy() 674 clk_mgr->smu_wm_set.wm_set); in dcn316_clk_mgr_destroy()
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D | dcn316_clk_mgr.h | 33 struct dcn316_watermarks *wm_set; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | vg_clk_mgr.c | 446 struct watermarks *table = clk_mgr_vgh->smu_wm_set.wm_set; in vg_notify_wm_ranges() 683 clk_mgr->smu_wm_set.wm_set = (struct watermarks *)dm_helpers_allocate_gpu_mem( in vg_clk_mgr_construct() 689 if (!clk_mgr->smu_wm_set.wm_set) { in vg_clk_mgr_construct() 690 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in vg_clk_mgr_construct() 693 ASSERT(clk_mgr->smu_wm_set.wm_set); in vg_clk_mgr_construct() 750 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in vg_clk_mgr_destroy() 752 clk_mgr->smu_wm_set.wm_set); in vg_clk_mgr_destroy()
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D | vg_clk_mgr.h | 36 struct watermarks *wm_set; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_clk_mgr.c | 480 struct dcn31_watermarks *table = clk_mgr_dcn31->smu_wm_set.wm_set; in dcn31_notify_wm_ranges() 694 clk_mgr->smu_wm_set.wm_set = (struct dcn31_watermarks *)dm_helpers_allocate_gpu_mem( in dcn31_clk_mgr_construct() 700 if (!clk_mgr->smu_wm_set.wm_set) { in dcn31_clk_mgr_construct() 701 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn31_clk_mgr_construct() 704 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn31_clk_mgr_construct() 805 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn31_clk_mgr_destroy() 807 clk_mgr->smu_wm_set.wm_set); in dcn31_clk_mgr_destroy()
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D | dcn31_clk_mgr.h | 33 struct dcn31_watermarks *wm_set; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_clk_mgr.c | 440 struct dcn315_watermarks *table = clk_mgr_dcn315->smu_wm_set.wm_set; in dcn315_notify_wm_ranges() 624 clk_mgr->smu_wm_set.wm_set = (struct dcn315_watermarks *)dm_helpers_allocate_gpu_mem( in dcn315_clk_mgr_construct() 630 if (!clk_mgr->smu_wm_set.wm_set) { in dcn315_clk_mgr_construct() 631 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn315_clk_mgr_construct() 634 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn315_clk_mgr_construct() 732 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn315_clk_mgr_destroy() 734 clk_mgr->smu_wm_set.wm_set); in dcn315_clk_mgr_destroy()
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D | dcn315_clk_mgr.h | 33 struct dcn315_watermarks *wm_set; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
D | dcn35_clk_mgr.h | 35 struct dcn35_watermarks *wm_set; member
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D | dcn35_clk_mgr.c | 701 struct dcn35_watermarks *table = clk_mgr_dcn35->smu_wm_set.wm_set; in dcn35_notify_wm_ranges() 1101 clk_mgr->smu_wm_set.wm_set = (struct dcn35_watermarks *)dm_helpers_allocate_gpu_mem( in dcn35_clk_mgr_construct() 1107 if (!clk_mgr->smu_wm_set.wm_set) { in dcn35_clk_mgr_construct() 1108 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn35_clk_mgr_construct() 1111 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn35_clk_mgr_construct() 1242 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn35_clk_mgr_destroy() 1244 clk_mgr->smu_wm_set.wm_set); in dcn35_clk_mgr_destroy()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_clk_mgr.h | 36 struct dcn314_watermarks *wm_set; member
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D | dcn314_clk_mgr.c | 545 struct dcn314_watermarks *table = clk_mgr_dcn314->smu_wm_set.wm_set; in dcn314_notify_wm_ranges() 805 clk_mgr->smu_wm_set.wm_set = (struct dcn314_watermarks *)dm_helpers_allocate_gpu_mem( in dcn314_clk_mgr_construct() 811 if (!clk_mgr->smu_wm_set.wm_set) { in dcn314_clk_mgr_construct() 812 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn314_clk_mgr_construct() 815 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn314_clk_mgr_construct() 916 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn314_clk_mgr_destroy() 918 clk_mgr->smu_wm_set.wm_set); in dcn314_clk_mgr_destroy()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn20/ |
D | dcn20_hubbub.c | 516 s->wm_set = 0; in hubbub2_wm_read_state() 527 s->wm_set = 1; in hubbub2_wm_read_state() 538 s->wm_set = 2; in hubbub2_wm_read_state() 549 s->wm_set = 3; in hubbub2_wm_read_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/ |
D | dcn35_hubbub.c | 408 s->wm_set = 0; in hubbub35_wm_read_state() 433 s->wm_set = 1; in hubbub35_wm_read_state() 459 s->wm_set = 2; in hubbub35_wm_read_state() 485 s->wm_set = 3; in hubbub35_wm_read_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/ |
D | dcn21_hubbub.c | 627 s->wm_set = 0; in hubbub21_wm_read_state() 641 s->wm_set = 1; in hubbub21_wm_read_state() 655 s->wm_set = 2; in hubbub21_wm_read_state() 669 s->wm_set = 3; in hubbub21_wm_read_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn10/ |
D | dcn10_hubbub.c | 51 s->wm_set = 0; in hubbub1_wm_read_state() 61 s->wm_set = 1; in hubbub1_wm_read_state() 71 s->wm_set = 2; in hubbub1_wm_read_state() 81 s->wm_set = 3; in hubbub1_wm_read_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | dchubbub.h | 56 uint32_t wm_set; member
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn32/ |
D | dcn32_hubbub.c | 857 s->wm_set = 0; in hubbub32_wm_read_state() 877 s->wm_set = 1; in hubbub32_wm_read_state() 897 s->wm_set = 2; in hubbub32_wm_read_state() 917 s->wm_set = 3; in hubbub32_wm_read_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | dcn20_fpu.c | 2209 struct dcn_watermarks *wm_set, in calculate_wm_set_for_vlevel() argument 2226 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 2227 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel() 2228 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 2229 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 2230 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 2231 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 2232 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel() 2233 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/ |
D | dcn401_hubbub.c | 561 s->wm_set = 0; in hubbub401_wm_read_state() 581 s->wm_set = 1; in hubbub401_wm_read_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_hw_sequencer_debug.c | 97 s->wm_set, in dcn10_get_hubbub_state()
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
D | dcn10_hwseq.c | 160 DTN_INFO("WM_Set[%d]:", s->wm_set); in dcn10_log_hubbub_state()
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