/linux-6.12.1/drivers/pci/endpoint/ |
D | pci-epc-mem.c | 48 struct pci_epc_mem_window *windows, in pci_epc_multi_mem_init() argument 62 if (!windows || !num_windows) in pci_epc_multi_mem_init() 65 epc->windows = kcalloc(num_windows, sizeof(*epc->windows), GFP_KERNEL); in pci_epc_multi_mem_init() 66 if (!epc->windows) in pci_epc_multi_mem_init() 70 page_size = windows[i].page_size; in pci_epc_multi_mem_init() 74 pages = windows[i].size >> page_shift; in pci_epc_multi_mem_init() 92 mem->window.phys_base = windows[i].phys_base; in pci_epc_multi_mem_init() 93 mem->window.size = windows[i].size; in pci_epc_multi_mem_init() 98 epc->windows[i] = mem; in pci_epc_multi_mem_init() 101 epc->mem = epc->windows[0]; in pci_epc_multi_mem_init() [all …]
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/linux-6.12.1/drivers/mailbox/ |
D | arm_mhuv2.c | 182 unsigned int windows; member 233 u32 windows; member 329 int i = priv->ch_wn_idx + priv->windows - 1; in mhuv2_data_transfer_rx_startup() 343 int i = priv->ch_wn_idx + priv->windows - 1; in mhuv2_data_transfer_rx_shutdown() 352 const int windows = priv->windows; in mhuv2_data_transfer_read_data() local 357 msg = kzalloc(sizeof(*msg) + windows * MHUV2_STAT_BYTES, GFP_KERNEL); in mhuv2_data_transfer_read_data() 362 msg->len = windows * MHUV2_STAT_BYTES; in mhuv2_data_transfer_read_data() 376 for (i = 0; i < windows; i++) { in mhuv2_data_transfer_read_data() 378 data[windows - 1 - i] = readl_relaxed(&mhu->recv->ch_wn[idx].stat); in mhuv2_data_transfer_read_data() 389 int i = priv->ch_wn_idx + priv->windows - 1; in mhuv2_data_transfer_tx_startup() [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/dispnv50/ |
D | corec37d.c | 37 const u32 windows = 8; /*XXX*/ in corec37d_wndw_owner() local 40 if ((ret = PUSH_WAIT(push, windows * 2))) in corec37d_wndw_owner() 43 for (i = 0; i < windows; i++) { in corec37d_wndw_owner() 131 const u32 windows = 8; /*XXX*/ in corec37d_init() local 134 if ((ret = PUSH_WAIT(push, 2 + windows * 5))) in corec37d_init() 139 for (i = 0; i < windows; i++) { in corec37d_init()
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D | corec57d.c | 33 const u32 windows = 8; /*XXX*/ in corec57d_init() local 36 if ((ret = PUSH_WAIT(push, 2 + windows * 5))) in corec57d_init() 41 for (i = 0; i < windows; i++) { in corec57d_init()
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/linux-6.12.1/drivers/pci/controller/ |
D | pcie-iproc-bcma.c | 62 pci_add_resource(&bridge->windows, &pcie->mem); in iproc_bcma_pcie_probe() 63 ret = devm_request_pci_bus_resources(dev, &bridge->windows); in iproc_bcma_pcie_probe() 71 return iproc_pcie_setup(pcie, &bridge->windows); in iproc_bcma_pcie_probe()
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D | pcie-rockchip-ep.c | 506 struct pci_epc_mem_window *windows = NULL; in rockchip_pcie_ep_probe() local 555 windows = devm_kcalloc(dev, ep->max_regions, in rockchip_pcie_ep_probe() 557 if (!windows) { in rockchip_pcie_ep_probe() 562 windows[i].phys_base = rockchip->mem_res->start + (SZ_1M * i); in rockchip_pcie_ep_probe() 563 windows[i].size = SZ_1M; in rockchip_pcie_ep_probe() 564 windows[i].page_size = SZ_1M; in rockchip_pcie_ep_probe() 566 err = pci_epc_multi_mem_init(epc, windows, ep->max_regions); in rockchip_pcie_ep_probe() 567 devm_kfree(dev, windows); in rockchip_pcie_ep_probe()
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | mobiveil-pcie.txt | 4 has up to 8 outbound and inbound windows for the address translation. 21 - apio-wins : number of requested apio outbound windows 22 default 2 outbound windows are configured - 25 - ppio-wins : number of requested ppio inbound windows
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D | ti-pci.txt | 52 - num-ib-windows : number of inbound address translation windows 53 - num-ob-windows : number of outbound address translation windows
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/linux-6.12.1/Documentation/admin-guide/media/ |
D | lmedm04.rst | 12 The Sharp 7395 driver can be found in windows/system32/drivers 57 only found in windows/system32/drivers 69 The Sharp 0194 tuner driver can be found in windows/system32/drivers 90 The m88rs2000 tuner driver can be found in windows/system32/drivers
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/linux-6.12.1/Documentation/devicetree/bindings/powerpc/fsl/ |
D | ecm.txt | 9 windows are configured. For ECM based devices this is the first 4k 11 number of local access windows as specified by fsl,num-laws. 31 windows for this device.
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D | mcm.txt | 9 windows are configured. For MCM based devices this is the first 4k 11 number of local access windows as specified by fsl,num-laws. 31 windows for this device.
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/linux-6.12.1/Documentation/driver-api/ |
D | vme.rst | 59 The driver can request ownership of one or more master windows 60 (:c:func:`vme_master_request`), slave windows (:c:func:`vme_slave_request`) 64 attributes of the driver in question. For slave windows these attributes are 66 bus cycle types required in 'cycle'. Master windows add a further set of 84 Master windows 87 Master windows provide access from the local processor[s] out onto the VME bus. 88 The number of windows available and the available access modes is dependent on 106 :c:func:`vme_master_write` used to write to configured master windows. 113 Slave windows 116 Slave windows provide devices on the VME bus access into mapped portions of the [all …]
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/linux-6.12.1/arch/alpha/kernel/ |
D | sys_nautilus.c | 212 pci_add_resource(&bridge->windows, &ioport_resource); in nautilus_init_pci() 215 pci_add_resource(&bridge->windows, &irongate_mem); in nautilus_init_pci() 217 pci_add_resource(&bridge->windows, &busn_resource); in nautilus_init_pci()
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/linux-6.12.1/arch/m68k/coldfire/ |
D | pci.c | 232 pci_add_resource(&bridge->windows, &ioport_resource); in mcf_pci_init() 233 pci_add_resource(&bridge->windows, &iomem_resource); in mcf_pci_init() 234 pci_add_resource(&bridge->windows, &busn_resource); in mcf_pci_init()
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/linux-6.12.1/drivers/spi/ |
D | spi-aspeed-smc.c | 391 struct aspeed_spi_window windows[ASPEED_SPI_MAX_NUM_CS]) in aspeed_spi_get_windows() 399 windows[cs].cs = cs; in aspeed_spi_get_windows() 400 windows[cs].size = data->segment_end(aspi, reg_val) - in aspeed_spi_get_windows() 402 windows[cs].offset = data->segment_start(aspi, reg_val) - aspi->ahb_base_phy; in aspeed_spi_get_windows() 404 windows[cs].offset, windows[cs].size); in aspeed_spi_get_windows() 415 struct aspeed_spi_window windows[ASPEED_SPI_MAX_NUM_CS] = { 0 }; in aspeed_spi_chip_set_default_window() local 416 struct aspeed_spi_window *win = &windows[chip->cs]; in aspeed_spi_chip_set_default_window() 423 aspeed_spi_get_windows(aspi, windows); in aspeed_spi_chip_set_default_window() 485 struct aspeed_spi_window windows[ASPEED_SPI_MAX_NUM_CS] = { 0 }; in aspeed_spi_chip_adjust_window() local 486 struct aspeed_spi_window *win = &windows[chip->cs]; in aspeed_spi_chip_adjust_window() [all …]
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/linux-6.12.1/Documentation/arch/powerpc/ |
D | pci_iov_resource_on_powernv.rst | 58 contain two "windows", depending on the value of PCI address bit 59. 63 - For MSIs, we have two windows in the address space (one at the top of 74 Like other PCI host bridges, the Power8 IODA2 PHB supports "windows" 76 window and sixteen M64 windows. They have different characteristics. 101 SR-IOV). We basically use the trick of forcing the bridge MMIO windows 110 - The M64 windows: 123 * Support overlaps. If an address is covered by multiple windows, 155 We would like to investigate using additional M64 windows in "single 201 - Single segmented M64 windows: A segmented M64 window could be used just 207 - Multiple segmented M64 windows: As usual, each window is split into 256 [all …]
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/linux-6.12.1/drivers/pci/ |
D | host-bridge.c | 58 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_resource_to_bus() 83 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_bus_to_resource()
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D | of.c | 597 INIT_LIST_HEAD(&bridge->windows); in pci_parse_request_of_pci_ranges() 600 err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows, in pci_parse_request_of_pci_ranges() 605 err = devm_request_pci_bus_resources(dev, &bridge->windows); in pci_parse_request_of_pci_ranges() 609 resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { in pci_parse_request_of_pci_ranges()
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/linux-6.12.1/Documentation/devicetree/bindings/bus/ |
D | mvebu-mbus.txt | 37 size for the address decoding windows allocated for 106 entries for translation that do not correspond to valid windows (S = 0xf) 198 The mbus-node ranges property defines a set of mbus windows that are expected 203 chooses to use a different set of mbus windows, it must ensure that any address 206 The operating system may insert additional mbus windows that do not conflict 210 is needed to set up the other windows.
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/linux-6.12.1/drivers/pinctrl/renesas/ |
D | core.c | 33 struct sh_pfc_window *windows; in sh_pfc_map_resources() local 54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources() 56 if (windows == NULL) in sh_pfc_map_resources() 60 pfc->windows = windows; in sh_pfc_map_resources() 74 windows->virt = devm_platform_get_and_ioremap_resource(pdev, i, &res); in sh_pfc_map_resources() 75 if (IS_ERR(windows->virt)) in sh_pfc_map_resources() 77 windows->phys = res->start; in sh_pfc_map_resources() 78 windows->size = resource_size(res); in sh_pfc_map_resources() 79 windows++; in sh_pfc_map_resources() 95 window = pfc->windows + i; in sh_pfc_phys_to_virt()
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/linux-6.12.1/drivers/ntb/hw/idt/ |
D | Kconfig | 19 with chosen valid aperture. For memory windows related BARs the 20 aperture settings shall determine the maximum size of memory windows
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/linux-6.12.1/Documentation/gpu/ |
D | tegra.rst | 86 A display controller controls a set of windows that can be used to composite 88 ordering to individual windows (by programming the corresponding blending 90 assume a fixed Z ordering of the windows (window A is the root window, that 91 is, the lowest, while windows B and C are overlaid on top of window A). The 92 overlay windows support multiple pixel formats and can automatically convert
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/linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
D | rk3568.dtsi | 87 num-ib-windows = <6>; 88 num-ob-windows = <2>; 140 num-ib-windows = <6>; 141 num-ob-windows = <2>;
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D | rk3568-nanopi-r5s.dts | 105 num-ib-windows = <8>; 106 num-ob-windows = <8>;
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/linux-6.12.1/Documentation/sound/cards/ |
D | maya44.rst | 125 …lease refer to the block diagram on p.24 of the ESI Maya44 manual, or in the ESI windows software). 143 … analogue bypass from ADC input to output for channel 1+2. Same as "Monitor" in the windows driver. 155 This is not supported by the ESI windows driver. 162 They are not supported by the ESI windows driver.
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