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/linux-6.12.1/drivers/net/wireless/realtek/rtw88/
Dfw.h391 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \ argument
392 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0))
393 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \ argument
394 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
395 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \ argument
396 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16))
397 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \ argument
398 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0))
407 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ argument
408 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16))
[all …]
/linux-6.12.1/drivers/media/pci/cx25821/
Dcx25821-medusa-video.c24 u32 value = 0; in medusa_enable_bluefield_output() local
63 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl, &tmp); in medusa_enable_bluefield_output()
64 value &= 0xFFFFFF7F; /* clear BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
66 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
67 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl, value); in medusa_enable_bluefield_output()
69 value = cx25821_i2c_read(&dev->i2c_bus[0], out_ctrl_ns, &tmp); in medusa_enable_bluefield_output()
70 value &= 0xFFFFFF7F; in medusa_enable_bluefield_output()
72 value |= 0x00000080; /* set BLUE_FIELD_EN */ in medusa_enable_bluefield_output()
73 cx25821_i2c_write(&dev->i2c_bus[0], out_ctrl_ns, value); in medusa_enable_bluefield_output()
80 u32 value = 0; in medusa_initialize_ntsc() local
[all …]
/linux-6.12.1/tools/perf/arch/powerpc/annotate/
Dinstructions.c58 int value; member
80 { .name = "OP_31_XOP_LXSIWZX", .value = 12, },
81 { .name = "OP_31_XOP_LWARX", .value = 20, },
82 { .name = "OP_31_XOP_LDX", .value = 21, },
83 { .name = "OP_31_XOP_LWZX", .value = 23, },
84 { .name = "OP_31_XOP_LDUX", .value = 53, },
85 { .name = "OP_31_XOP_LWZUX", .value = 55, },
86 { .name = "OP_31_XOP_LXSIWAX", .value = 76, },
87 { .name = "OP_31_XOP_LDARX", .value = 84, },
88 { .name = "OP_31_XOP_LBZX", .value = 87, },
[all …]
/linux-6.12.1/tools/testing/selftests/kvm/include/x86_64/
Devmcs.h271 static inline int evmcs_vmptrst(uint64_t *value) in evmcs_vmptrst() argument
273 *value = current_vp_assist->current_nested_vmcs & in evmcs_vmptrst()
279 static inline int evmcs_vmread(uint64_t encoding, uint64_t *value) in evmcs_vmread() argument
283 *value = current_evmcs->guest_rip; in evmcs_vmread()
286 *value = current_evmcs->guest_rsp; in evmcs_vmread()
289 *value = current_evmcs->guest_rflags; in evmcs_vmread()
292 *value = current_evmcs->host_ia32_pat; in evmcs_vmread()
295 *value = current_evmcs->host_ia32_efer; in evmcs_vmread()
298 *value = current_evmcs->host_cr0; in evmcs_vmread()
301 *value = current_evmcs->host_cr3; in evmcs_vmread()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_opp_csc_v.c127 uint32_t value = 0; in program_color_matrix_v() local
131 value, in program_color_matrix_v()
137 value, in program_color_matrix_v()
142 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
145 uint32_t value = 0; in program_color_matrix_v() local
149 value, in program_color_matrix_v()
155 value, in program_color_matrix_v()
160 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
163 uint32_t value = 0; in program_color_matrix_v() local
167 value, in program_color_matrix_v()
[all …]
Ddce110_opp_regamma_v.c37 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut() local
43 value, in power_on_lut()
49 value, in power_on_lut()
56 value, in power_on_lut()
62 value, in power_on_lut()
68 dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value); in power_on_lut()
71 value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut()
72 if (get_reg_field_value(value, in power_on_lut()
75 get_reg_field_value(value, in power_on_lut()
86 uint32_t value; in set_bypass_input_gamma() local
[all …]
Ddce110_timing_generator.c95 uint32_t value = 0; in dce110_timing_generator_is_in_vertical_blank() local
100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank()
101 field = get_reg_field_value(value, CRTC_STATUS, CRTC_V_BLANK); in dce110_timing_generator_is_in_vertical_blank()
128 uint32_t value = 0; in dce110_timing_generator_enable_crtc() local
135 value, in dce110_timing_generator_enable_crtc()
140 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); in dce110_timing_generator_enable_crtc()
143 value = 0; in dce110_timing_generator_enable_crtc()
144 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value); in dce110_timing_generator_enable_crtc()
157 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_program_blank_color() local
160 value, in dce110_timing_generator_program_blank_color()
[all …]
Ddce110_mem_input_v.c43 uint32_t value = 0; in set_flip_control() local
45 value = dm_read_reg( in set_flip_control()
49 set_reg_field_value(value, 1, in set_flip_control()
56 value); in set_flip_control()
64 uint32_t value = 0; in program_pri_addr_c() local
70 set_reg_field_value(value, temp, in program_pri_addr_c()
77 value); in program_pri_addr_c()
80 value = 0; in program_pri_addr_c()
84 set_reg_field_value(value, temp, in program_pri_addr_c()
91 value); in program_pri_addr_c()
[all …]
Ddce110_timing_generator_v.c59 uint32_t value; in dce110_timing_generator_v_enable_crtc() local
61 value = 0; in dce110_timing_generator_v_enable_crtc()
62 set_reg_field_value(value, 0, in dce110_timing_generator_v_enable_crtc()
65 mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
68 value = 0; in dce110_timing_generator_v_enable_crtc()
69 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
71 value = 0; in dce110_timing_generator_v_enable_crtc()
72 set_reg_field_value(value, 1, in dce110_timing_generator_v_enable_crtc()
75 mmCRTCV_MASTER_EN, value); in dce110_timing_generator_v_enable_crtc()
82 uint32_t value; in dce110_timing_generator_v_disable_crtc() local
[all …]
/linux-6.12.1/drivers/phy/tegra/
Dxusb-tegra210.c468 u32 value; in tegra210_pex_uphy_enable() local
486 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
487 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK << in tegra210_pex_uphy_enable()
489 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL << in tegra210_pex_uphy_enable()
491 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in tegra210_pex_uphy_enable()
493 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()
494 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK << in tegra210_pex_uphy_enable()
496 value |= XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL << in tegra210_pex_uphy_enable()
498 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in tegra210_pex_uphy_enable()
500 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in tegra210_pex_uphy_enable()
[all …]
Dxusb-tegra186.c278 static inline void ao_writel(struct tegra186_xusb_padctl *priv, u32 value, unsigned int offset) in ao_writel() argument
280 writel(value, priv->ao_regs + offset); in ao_writel()
334 u32 value; in tegra186_utmi_enable_phy_sleepwalk() local
339 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
340 value &= ~MASTER_ENABLE; in tegra186_utmi_enable_phy_sleepwalk()
341 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
344 value = ao_readl(priv, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
345 value |= MASTER_CFG_SEL; in tegra186_utmi_enable_phy_sleepwalk()
346 ao_writel(priv, value, XUSB_AO_UTMIP_SLEEPWALK_CFG(index)); in tegra186_utmi_enable_phy_sleepwalk()
349 value = ao_readl(priv, XUSB_AO_USB_DEBOUNCE_DEL); in tegra186_utmi_enable_phy_sleepwalk()
[all …]
/linux-6.12.1/drivers/video/fbdev/riva/
Dnvreg.h34 #define SetBF(mask,value) ((value) << (0?mask)) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
38 | SetBF(mask,value)))
47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument
51 #define DEVICE_DEF(device,mask,value) \ argument
52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
60 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) argument
[all …]
/linux-6.12.1/tools/testing/selftests/bpf/bpf_testmod/
Dbpf_testmod.h29 s64 value; member
51 int (*tramp_1)(int value);
52 int (*tramp_2)(int value);
53 int (*tramp_3)(int value);
54 int (*tramp_4)(int value);
55 int (*tramp_5)(int value);
56 int (*tramp_6)(int value);
57 int (*tramp_7)(int value);
58 int (*tramp_8)(int value);
59 int (*tramp_9)(int value);
[all …]
/linux-6.12.1/tools/power/x86/intel-speed-select/
Disst-display.c85 char *value) in format_and_print_txt() argument
102 if (header && value) { in format_and_print_txt()
104 fprintf(outf, "%s:%s\n", header, value); in format_and_print_txt()
112 static void format_and_print(FILE *outf, int level, char *header, char *value) in format_and_print() argument
119 format_and_print_txt(outf, level, header, value); in format_and_print()
139 if (value) { in format_and_print()
144 fprintf(outf, "\"%s\"", value); in format_and_print()
215 static char value[1024]; in _isst_pbf_display_information() local
221 snprintf(value, sizeof(value), "%d", in _isst_pbf_display_information()
223 format_and_print(outf, disp_level + 1, header, value); in _isst_pbf_display_information()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/include/
Dfixed31_32.h58 long long value; member
91 res.value = (long long) arg << FIXED31_32_BITS_PER_FRACTIONAL_PART; in dc_fixpt_from_int()
109 res.value = -arg.value; in dc_fixpt_neg()
120 if (arg.value < 0) in dc_fixpt_abs()
137 return arg1.value < arg2.value; in dc_fixpt_lt()
146 return arg1.value <= arg2.value; in dc_fixpt_le()
155 return arg1.value == arg2.value; in dc_fixpt_eq()
164 if (arg1.value <= arg2.value) in dc_fixpt_min()
176 if (arg1.value <= arg2.value) in dc_fixpt_max()
212 ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) || in dc_fixpt_shl()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/spl/
Dspl_fixpt31_32.h43 long long value; member
76 res.value = (long long) arg << FIXED31_32_BITS_PER_FRACTIONAL_PART; in spl_fixpt_from_int()
94 res.value = -arg.value; in spl_fixpt_neg()
105 if (arg.value < 0) in spl_fixpt_abs()
122 return arg1.value < arg2.value; in spl_fixpt_lt()
131 return arg1.value <= arg2.value; in spl_fixpt_le()
140 return arg1.value == arg2.value; in spl_fixpt_eq()
149 if (arg1.value <= arg2.value) in spl_fixpt_min()
161 if (arg1.value <= arg2.value) in spl_fixpt_max()
197 ASSERT(((arg.value >= 0) && (arg.value <= LLONG_MAX >> shift)) || in spl_fixpt_shl()
[all …]
Ddc_spl_scl_easf_filters.c1412 if (ratio.value < spl_fixpt_from_fraction(3, 10).value) in spl_get_easf_filter_3tap_64p()
1414 else if (ratio.value < spl_fixpt_from_fraction(4, 10).value) in spl_get_easf_filter_3tap_64p()
1416 else if (ratio.value < spl_fixpt_from_fraction(5, 10).value) in spl_get_easf_filter_3tap_64p()
1418 else if (ratio.value < spl_fixpt_from_fraction(6, 10).value) in spl_get_easf_filter_3tap_64p()
1420 else if (ratio.value < spl_fixpt_from_fraction(7, 10).value) in spl_get_easf_filter_3tap_64p()
1422 else if (ratio.value < spl_fixpt_from_fraction(8, 10).value) in spl_get_easf_filter_3tap_64p()
1424 else if (ratio.value < spl_fixpt_from_fraction(9, 10).value) in spl_get_easf_filter_3tap_64p()
1432 if (ratio.value < spl_fixpt_from_fraction(3, 10).value) in spl_get_easf_filter_4tap_64p()
1434 else if (ratio.value < spl_fixpt_from_fraction(4, 10).value) in spl_get_easf_filter_4tap_64p()
1436 else if (ratio.value < spl_fixpt_from_fraction(5, 10).value) in spl_get_easf_filter_4tap_64p()
[all …]
Ddc_spl_scl_filters.c1323 if (ratio.value < spl_fixpt_one.value) in spl_get_filter_3tap_16p()
1325 else if (ratio.value < spl_fixpt_from_fraction(4, 3).value) in spl_get_filter_3tap_16p()
1327 else if (ratio.value < spl_fixpt_from_fraction(5, 3).value) in spl_get_filter_3tap_16p()
1335 if (ratio.value < spl_fixpt_one.value) in spl_get_filter_3tap_64p()
1337 else if (ratio.value < spl_fixpt_from_fraction(4, 3).value) in spl_get_filter_3tap_64p()
1339 else if (ratio.value < spl_fixpt_from_fraction(5, 3).value) in spl_get_filter_3tap_64p()
1347 if (ratio.value < spl_fixpt_one.value) in spl_get_filter_4tap_16p()
1349 else if (ratio.value < spl_fixpt_from_fraction(4, 3).value) in spl_get_filter_4tap_16p()
1351 else if (ratio.value < spl_fixpt_from_fraction(5, 3).value) in spl_get_filter_4tap_16p()
1359 if (ratio.value < spl_fixpt_one.value) in spl_get_filter_4tap_64p()
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtw89/
Dcam.h15 static inline void FWCMD_SET_ADDR_IDX(void *cmd, u32 value) in FWCMD_SET_ADDR_IDX() argument
17 le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(7, 0)); in FWCMD_SET_ADDR_IDX()
20 static inline void FWCMD_SET_ADDR_OFFSET(void *cmd, u32 value) in FWCMD_SET_ADDR_OFFSET() argument
22 le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(15, 8)); in FWCMD_SET_ADDR_OFFSET()
25 static inline void FWCMD_SET_ADDR_LEN(void *cmd, u32 value) in FWCMD_SET_ADDR_LEN() argument
27 le32p_replace_bits((__le32 *)(cmd) + 1, value, GENMASK(23, 16)); in FWCMD_SET_ADDR_LEN()
30 static inline void FWCMD_SET_ADDR_VALID(void *cmd, u32 value) in FWCMD_SET_ADDR_VALID() argument
32 le32p_replace_bits((__le32 *)(cmd) + 2, value, BIT(0)); in FWCMD_SET_ADDR_VALID()
35 static inline void FWCMD_SET_ADDR_NET_TYPE(void *cmd, u32 value) in FWCMD_SET_ADDR_NET_TYPE() argument
37 le32p_replace_bits((__le32 *)(cmd) + 2, value, GENMASK(2, 1)); in FWCMD_SET_ADDR_NET_TYPE()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_scl_filters.c1343 if (ratio.value < dc_fixpt_one.value) in get_filter_3tap_16p()
1345 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value) in get_filter_3tap_16p()
1347 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value) in get_filter_3tap_16p()
1355 if (ratio.value < dc_fixpt_one.value) in get_filter_3tap_64p()
1357 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value) in get_filter_3tap_64p()
1359 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value) in get_filter_3tap_64p()
1367 if (ratio.value < dc_fixpt_one.value) in get_filter_4tap_16p()
1369 else if (ratio.value < dc_fixpt_from_fraction(4, 3).value) in get_filter_4tap_16p()
1371 else if (ratio.value < dc_fixpt_from_fraction(5, 3).value) in get_filter_4tap_16p()
1379 if (ratio.value < dc_fixpt_one.value) in get_filter_4tap_64p()
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/
Di915_getparam.c22 int value = 0; in i915_getparam_ioctl() local
32 value = pdev->device; in i915_getparam_ioctl()
35 value = pdev->revision; in i915_getparam_ioctl()
38 value = to_gt(i915)->ggtt->num_fences; in i915_getparam_ioctl()
41 value = !!i915->display.overlay; in i915_getparam_ioctl()
44 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
48 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
52 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
56 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
60 value = HAS_LLC(i915); in i915_getparam_ioctl()
[all …]
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwxgmac2_dma.c13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() local
16 writel(value | XGMAC_SWR, ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset()
18 return readl_poll_timeout(ioaddr + XGMAC_DMA_MODE, value, in dwxgmac2_dma_reset()
19 !(value & XGMAC_SWR), 0, 100000); in dwxgmac2_dma_reset()
25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() local
28 value |= XGMAC_AAL; in dwxgmac2_dma_init()
31 value |= XGMAC_EAME; in dwxgmac2_dma_init()
33 writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init()
40 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan() local
43 value |= XGMAC_PBLx8; in dwxgmac2_dma_init_chan()
[all …]
/linux-6.12.1/drivers/infiniband/hw/bnxt_re/
Dhw_counters.c159 stats->value[BNXT_RE_TX_ATOMIC_REQ] = s->tx_atomic_req; in bnxt_re_copy_ext_stats()
160 stats->value[BNXT_RE_TX_READ_REQ] = s->tx_read_req; in bnxt_re_copy_ext_stats()
161 stats->value[BNXT_RE_TX_READ_RES] = s->tx_read_res; in bnxt_re_copy_ext_stats()
162 stats->value[BNXT_RE_TX_WRITE_REQ] = s->tx_write_req; in bnxt_re_copy_ext_stats()
163 stats->value[BNXT_RE_TX_SEND_REQ] = s->tx_send_req; in bnxt_re_copy_ext_stats()
164 stats->value[BNXT_RE_TX_ROCE_PKTS] = s->tx_roce_pkts; in bnxt_re_copy_ext_stats()
165 stats->value[BNXT_RE_TX_ROCE_BYTES] = s->tx_roce_bytes; in bnxt_re_copy_ext_stats()
166 stats->value[BNXT_RE_RX_ATOMIC_REQ] = s->rx_atomic_req; in bnxt_re_copy_ext_stats()
167 stats->value[BNXT_RE_RX_READ_REQ] = s->rx_read_req; in bnxt_re_copy_ext_stats()
168 stats->value[BNXT_RE_RX_READ_RESP] = s->rx_read_res; in bnxt_re_copy_ext_stats()
[all …]
/linux-6.12.1/arch/mips/include/asm/
Dunaligned-emul.h8 #define _LoadHW(addr, value, res, type) \ argument
26 : "=&r" (value), "=r" (res) \
31 #define _LoadW(addr, value, res, type) \ argument
47 : "=&r" (value), "=r" (res) \
53 #define _LoadW(addr, value, res, type) \ argument
82 : "=&r" (value), "=r" (res) \
88 #define _LoadHWU(addr, value, res, type) \ argument
108 : "=&r" (value), "=r" (res) \
113 #define _LoadWU(addr, value, res, type) \ argument
131 : "=&r" (value), "=r" (res) \
[all …]
/linux-6.12.1/drivers/net/wwan/t7xx/
Dt7xx_dpmaif.c37 u32 value, ul_intr_enable, dl_intr_enable; in t7xx_dpmaif_init_intr() local
50 value, (value & ul_intr_enable) != ul_intr_enable, 0, in t7xx_dpmaif_init_intr()
65 value, (value & ul_intr_enable) != ul_intr_enable, 0, in t7xx_dpmaif_init_intr()
74 value = ioread32(hw_info->pcie_base + DPMAIF_AO_UL_AP_L1TIMR0); in t7xx_dpmaif_init_intr()
75 value |= DPMAIF_DL_INT_Q2APTOP | DPMAIF_DL_INT_Q2TOQ1; in t7xx_dpmaif_init_intr()
76 iowrite32(value, hw_info->pcie_base + DPMAIF_AO_UL_AP_L1TIMR0); in t7xx_dpmaif_init_intr()
85 u32 value, ul_int_que_done; in t7xx_dpmaif_mask_ulq_intr() local
94 value, (value & ul_int_que_done) == ul_int_que_done, 0, in t7xx_dpmaif_mask_ulq_intr()
99 value); in t7xx_dpmaif_mask_ulq_intr()
105 u32 value, ul_int_que_done; in t7xx_dpmaif_unmask_ulq_intr() local
[all …]

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