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Searched refs:valid_bank_mask (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/tools/testing/selftests/kvm/x86_64/
Dhyperv_ipi.c25 u64 valid_bank_mask; member
120 ipi_ex->vp_set.valid_bank_mask = 1 << 0; in sender_guest_code()
129 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 1); in sender_guest_code()
142 ipi_ex->vp_set.valid_bank_mask = 1 << 1; in sender_guest_code()
151 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 1); in sender_guest_code()
164 ipi_ex->vp_set.valid_bank_mask = 1 << 1 | 1; in sender_guest_code()
174 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 2); in sender_guest_code()
195 ipi_ex->vp_set.valid_bank_mask = 0; in sender_guest_code()
196 hyperv_write_xmm_input(&ipi_ex->vp_set.valid_bank_mask, 2); in sender_guest_code()
Dhyperv_tlb_flush.c26 u64 valid_bank_mask; member
273 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_2 / 64); in sender_guest_code()
288 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_2 / 64); in sender_guest_code()
306 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_2 / 64) | in sender_guest_code()
324 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_1 / 64) | in sender_guest_code()
432 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_2 / 64); in sender_guest_code()
448 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_2 / 64); in sender_guest_code()
467 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_2 / 64) | in sender_guest_code()
486 flush_ex->hv_vp_set.valid_bank_mask = BIT_ULL(WORKER_VCPU_ID_1 / 64) | in sender_guest_code()
/linux-6.12.1/arch/x86/kvm/
Dhyperv.c1794 u64 valid_bank_mask, unsigned long *vcpu_mask) in sparse_set_to_vcpu_mask() argument
1822 for_each_set_bit(bank, (unsigned long *)&valid_bank_mask, in sparse_set_to_vcpu_mask()
1836 static bool hv_is_vp_in_sparse_set(u32 vp_id, u64 valid_bank_mask, u64 sparse_banks[]) in hv_is_vp_in_sparse_set() argument
1841 if (!test_bit(valid_bit_nr, (unsigned long *)&valid_bank_mask)) in hv_is_vp_in_sparse_set()
1850 sbank = hweight64(valid_bank_mask & GENMASK_ULL(valid_bit_nr - 1, 0)); in hv_is_vp_in_sparse_set()
2019 u64 valid_bank_mask; in kvm_hv_flush_tlb() local
2062 valid_bank_mask = BIT_ULL(0); in kvm_hv_flush_tlb()
2088 trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask, in kvm_hv_flush_tlb()
2093 valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask; in kvm_hv_flush_tlb()
2097 if (hc->var_cnt != hweight64(valid_bank_mask)) in kvm_hv_flush_tlb()
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Dtrace.h1588 TP_PROTO(u64 valid_bank_mask, u64 format, u64 address_space, u64 flags, bool guest_mode),
1589 TP_ARGS(valid_bank_mask, format, address_space, flags, guest_mode),
1592 __field(u64, valid_bank_mask)
1600 __entry->valid_bank_mask = valid_bank_mask;
1609 __entry->valid_bank_mask, __entry->format,
1636 TP_PROTO(u32 vector, u64 format, u64 valid_bank_mask),
1637 TP_ARGS(vector, format, valid_bank_mask),
1642 __field(u64, valid_bank_mask)
1648 __entry->valid_bank_mask = valid_bank_mask;
1653 __entry->valid_bank_mask)
/linux-6.12.1/arch/x86/hyperv/
Dmmu.c198 flush->hv_vp_set.valid_bank_mask = 0; in hyperv_flush_tlb_others_ex()
Dhv_apic.c126 ipi_arg->vp_set.valid_bank_mask = 0; in __send_ipi_mask_ex()
Dirqdomain.c43 intr_desc->target.vp_set.valid_bank_mask = 0; in hv_map_interrupt()
/linux-6.12.1/include/asm-generic/
Dmshyperv.h271 vpset->valid_bank_mask = GENMASK_ULL(nr_bank - 1, 0); in __cpumask_to_vpset()
Dhyperv-tlfs.h415 u64 valid_bank_mask; member