| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | umc_v8_7.c | 44 uint32_t umc_inst, in get_umc_v8_7_reg_offset() argument
47 return adev->umc.channel_offs*ch_inst + UMC_8_INST_DIST*umc_inst; in get_umc_v8_7_reg_offset()
51 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_query_correctable_error_count() argument
58 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_query_correctable_error_count()
70 uint32_t umc_inst, uint32_t ch_inst, in umc_v8_7_ecc_info_querry_uncorrectable_error_count() argument
77 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
95 uint32_t umc_inst = 0; in umc_v8_7_ecc_info_query_ras_error_count() local
101 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v8_7_ecc_info_query_ras_error_count()
103 umc_inst, ch_inst, in umc_v8_7_ecc_info_query_ras_error_count()
106 umc_inst, ch_inst, in umc_v8_7_ecc_info_query_ras_error_count()
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| D | umc_v6_7.c | 47 uint32_t umc_inst, in get_umc_v6_7_reg_offset() argument
50 uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst; in get_umc_v6_7_reg_offset()
54 umc_inst = index / 4; in get_umc_v6_7_reg_offset()
57 return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST * umc_inst; in get_umc_v6_7_reg_offset()
95 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_query_correctable_error_count() argument
104 umc_inst, ch_inst); in umc_v6_7_ecc_info_query_correctable_error_count()
106 eccinfo_table_idx = umc_inst * adev->umc.channel_inst_num + ch_inst; in umc_v6_7_ecc_info_query_correctable_error_count()
119 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_ecc_info_query_correctable_error_count()
137 uint32_t umc_inst, uint32_t ch_inst, in umc_v6_7_ecc_info_querry_uncorrectable_error_count() argument
146 umc_inst, ch_inst); in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
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| D | umc_v8_10.c | 72 uint32_t umc_inst, in get_umc_v8_10_reg_offset() argument
75 return adev->umc.channel_offs * ch_inst + UMC_8_INST_DIST * umc_inst + in get_umc_v8_10_reg_offset()
80 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_clear_error_count_per_channel() argument
85 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_clear_error_count_per_channel()
144 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_ecc_error_count() argument
149 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_query_ecc_error_count()
207 uint32_t ch_inst, uint32_t umc_inst, in umc_v8_10_convert_error_address() argument
218 umc_inst * adev->umc.channel_inst_num + in umc_v8_10_convert_error_address()
240 retired_page_addr, channel_index, umc_inst); in umc_v8_10_convert_error_address()
245 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_error_address() argument
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| D | amdgpu_umc.h | 45 #define LOOP_UMC_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < adev->umc.umc_inst_num; (umc_inst… argument
47 #define LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) LOOP_UMC_INST((umc_inst)) LOOP_UMC_CH_INST((ch_inst… argument
52 #define LOOP_UMC_EACH_NODE_INST_AND_CH(node_inst, umc_inst, ch_inst) \ argument
53 LOOP_UMC_NODE_INST((node_inst)) LOOP_UMC_INST_AND_CH((umc_inst), (ch_inst))
59 uint32_t umc_inst, uint32_t ch_inst, void *data);
119 uint32_t umc_inst);
125 uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst);
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| D | umc_v6_1.c | 88 uint32_t umc_inst, in get_umc_6_reg_offset() argument
91 return adev->umc.channel_offs*ch_inst + UMC_6_INST_DIST*umc_inst; in get_umc_6_reg_offset()
147 uint32_t umc_inst = 0; in umc_v6_1_clear_error_count() local
156 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v6_1_clear_error_count()
158 umc_inst, in umc_v6_1_clear_error_count()
259 uint32_t umc_inst = 0; in umc_v6_1_query_ras_error_count() local
272 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v6_1_query_ras_error_count()
274 umc_inst, in umc_v6_1_query_ras_error_count()
299 uint32_t umc_inst) in umc_v6_1_query_error_address() argument
303 …uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst… in umc_v6_1_query_error_address()
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| D | amdgpu_umc.c | 33 uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_convert_error_address() argument
38 err_data, err_addr, ch_inst, umc_inst); in amdgpu_umc_convert_error_address()
50 uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) in amdgpu_umc_page_retirement_mca() argument
75 ch_inst, umc_inst); in amdgpu_umc_page_retirement_mca()
361 uint32_t umc_inst) in amdgpu_umc_fill_error_record() argument
379 err_rec->mcumc_id = umc_inst; in amdgpu_umc_fill_error_record()
390 uint32_t umc_inst = 0; in amdgpu_umc_loop_channels() local
395 LOOP_UMC_EACH_NODE_INST_AND_CH(node_inst, umc_inst, ch_inst) { in amdgpu_umc_loop_channels()
396 ret = func(adev, node_inst, umc_inst, ch_inst, data); in amdgpu_umc_loop_channels()
399 node_inst, umc_inst, ch_inst, ret); in amdgpu_umc_loop_channels()
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| D | umc_v12_0.c | 36 uint32_t umc_inst, in get_umc_v12_0_reg_offset() argument
39 uint32_t index = umc_inst * adev->umc.channel_inst_num + ch_inst; in get_umc_v12_0_reg_offset()
42 umc_inst = index / 4; in get_umc_v12_0_reg_offset()
45 return adev->umc.channel_offs * ch_inst + UMC_V12_0_INST_DIST * umc_inst + in get_umc_v12_0_reg_offset()
50 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_reset_error_count_per_channel() argument
55 get_umc_v12_0_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v12_0_reset_error_count_per_channel()
137 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_query_error_count() argument
151 get_umc_v12_0_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v12_0_query_error_count()
216 retired_page, channel_index, addr_in->ma.umc_inst); in umc_v12_0_convert_error_address()
224 retired_page, channel_index, addr_in->ma.umc_inst); in umc_v12_0_convert_error_address()
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| D | umc_v6_7.h | 76 uint32_t ch_inst, uint32_t umc_inst);
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| D | ta_ras_if.h | 147 uint32_t umc_inst; member
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| D | amdgpu_ras.c | 4166 uint32_t umc_inst = 0, ch_inst = 0; in amdgpu_bad_page_notifier() local
4199 umc_inst = GET_UMC_INST(m->ipid); in amdgpu_bad_page_notifier()
4203 umc_inst, ch_inst); in amdgpu_bad_page_notifier()
4205 if (!amdgpu_umc_page_retirement_mca(adev, m->addr, ch_inst, umc_inst)) in amdgpu_bad_page_notifier()
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