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Searched refs:ulClock (Results 1 – 10 of 10) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dppatomctrl.c225 engine_clock_parameters.sReserved.ulClock = in atomctrl_set_engine_dram_timings_rv770()
296 mpll_parameters.ulClock = cpu_to_le32(clock_value); in atomctrl_get_memory_pll_dividers_si()
345 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value); in atomctrl_get_memory_pll_dividers_vi()
353 (uint32_t)mpll_parameters.ulClock.ucPostDiv; in atomctrl_get_memory_pll_dividers_vi()
366 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value); in atomctrl_get_memory_pll_dividers_ai()
380 mpll_param->ulClock = in atomctrl_get_memory_pll_dividers_ai()
381 le32_to_cpu(mpll_parameters.ulClock.ulClock); in atomctrl_get_memory_pll_dividers_ai()
382 mpll_param->ulPostDiv = mpll_parameters.ulClock.ucPostDiv; in atomctrl_get_memory_pll_dividers_ai()
396 pll_parameters.ulClock = cpu_to_le32(clock_value); in atomctrl_get_engine_pll_dividers_kong()
404 dividers->real_clock = le32_to_cpu(pll_parameters.ulClock); in atomctrl_get_engine_pll_dividers_kong()
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Dppatomfwctrl.h61 uint32_t ulClock; /* the actual clock */ member
Dppatomctrl.h141 uint32_t ulClock; member
Dppatomfwctrl.c266 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.c1061 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ in amdgpu_atombios_get_clock_dividers()
1068 dividers->real_clock = le32_to_cpu(args.v4.ulClock); in amdgpu_atombios_get_clock_dividers()
1073 args.v6_in.ulClock.ulComputeClockFlag = clock_type; in amdgpu_atombios_get_clock_dividers()
1074 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ in amdgpu_atombios_get_clock_dividers()
1085 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); in amdgpu_atombios_get_clock_dividers()
1086 dividers->post_divider = args.v6_out.ulClock.ucPostDiv; in amdgpu_atombios_get_clock_dividers()
1115 args.ulClock = cpu_to_le32(clock); /* 10 khz */ in amdgpu_atombios_get_memory_pll_dividers()
1162 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); in amdgpu_atombios_set_engine_dram_timings()
/linux-6.12.1/drivers/gpu/drm/amd/include/
Datombios.h440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di… member
449 ULONG ulClock; //When return, [23:0] return real clock member
496 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
518 ULONG ulClock:24; //Input= target clock, output = actual clock member
520 ULONG ulClock:24; //Input= target clock, output = actual clock
529 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
546 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
558 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member
571 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
582 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member
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/linux-6.12.1/drivers/gpu/drm/radeon/
Dradeon_atombios.c2855 args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2869 args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2877 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? in radeon_atom_get_clock_dividers()
2879 dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0; in radeon_atom_get_clock_dividers()
2923 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2928 dividers->real_clock = le32_to_cpu(args.v4.ulClock); in radeon_atom_get_clock_dividers()
2933 args.v6_in.ulClock.ulComputeClockFlag = clock_type; in radeon_atom_get_clock_dividers()
2934 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()
2943 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); in radeon_atom_get_clock_dividers()
2944 dividers->post_divider = args.v6_out.ulClock.ucPostDiv; in radeon_atom_get_clock_dividers()
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Datombios.h410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di… member
419 ULONG ulClock; //When return, [23:0] return real clock member
462 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
484 ULONG ulClock:24; //Input= target clock, output = actual clock member
486 ULONG ulClock:24; //Input= target clock, output = actual clock
495 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
512 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member
523 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member
543 ULONG ulClock; member
568 ATOM_COMPUTE_CLOCK_FREQ ulClock; member
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/linux-6.12.1/drivers/media/dvb-frontends/
Ddrxd_hard.c2441 u32 ulClock = state->config.clock; in CDRXD() local
2545 state->osc_clock_freq = (u16) ulClock; in CDRXD()
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c973 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; in vegam_calculate_mclk_params()