Searched refs:ubwc_config (Results 1 – 4 of 4) sorted by relevance
506 gpu->ubwc_config.rgb565_predicator = 0; in a6xx_calc_ubwc_config()507 gpu->ubwc_config.uavflagprd_inv = 0; in a6xx_calc_ubwc_config()508 gpu->ubwc_config.min_acc_len = 0; in a6xx_calc_ubwc_config()509 gpu->ubwc_config.ubwc_swizzle = 0x6; in a6xx_calc_ubwc_config()510 gpu->ubwc_config.macrotile_mode = 0; in a6xx_calc_ubwc_config()511 gpu->ubwc_config.highest_bank_bit = 15; in a6xx_calc_ubwc_config()514 gpu->ubwc_config.highest_bank_bit = 13; in a6xx_calc_ubwc_config()515 gpu->ubwc_config.min_acc_len = 1; in a6xx_calc_ubwc_config()516 gpu->ubwc_config.ubwc_swizzle = 0x7; in a6xx_calc_ubwc_config()520 gpu->ubwc_config.highest_bank_bit = 14; in a6xx_calc_ubwc_config()[all …]
836 BUG_ON(adreno_gpu->ubwc_config.highest_bank_bit < 13); in a5xx_hw_init()837 hbb = adreno_gpu->ubwc_config.highest_bank_bit - 13; in a5xx_hw_init()1800 adreno_gpu->ubwc_config.highest_bank_bit = 15; in a5xx_gpu_init()1802 adreno_gpu->ubwc_config.highest_bank_bit = 14; in a5xx_gpu_init()1805 adreno_gpu->ubwc_config.macrotile_mode = 0; in a5xx_gpu_init()1806 adreno_gpu->ubwc_config.ubwc_swizzle = 0x7; in a5xx_gpu_init()
377 *value = adreno_gpu->ubwc_config.highest_bank_bit; in adreno_get_param()383 *value = adreno_gpu->ubwc_config.ubwc_swizzle; in adreno_get_param()386 *value = adreno_gpu->ubwc_config.macrotile_mode; in adreno_get_param()
230 } ubwc_config; member