| /linux-6.12.1/arch/arm/mach-omap1/ |
| D | serial.c | 73 .uartclk = OMAP16XX_BASE_BAUD * 16,
81 .uartclk = OMAP16XX_BASE_BAUD * 16,
89 .uartclk = OMAP16XX_BASE_BAUD * 16,
112 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
113 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
114 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
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| /linux-6.12.1/drivers/tty/serial/8250/ |
| D | 8250_acorn.c | 27 unsigned int uartclk; member
65 uart.port.uartclk = type->uartclk; in serial_card_probe()
96 .uartclk = 7372800,
103 .uartclk = 3686400,
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| D | 8250_bcm2835aux.c | 89 unsigned int uartclk; in bcm2835aux_serial_probe() local
148 uartclk = clk_get_rate(data->clk); in bcm2835aux_serial_probe()
149 if (uartclk) in bcm2835aux_serial_probe()
150 up.port.uartclk = uartclk; in bcm2835aux_serial_probe()
157 up.port.uartclk *= 2; in bcm2835aux_serial_probe()
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| D | 8250_ingenic.c | 86 dev->port.uartclk = be32_to_cpup(prop); in ingenic_early_console_setup_clock()
107 divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * baud); in ingenic_earlycon_setup_tail()
147 if (dev->port.uartclk >= 16000000) in jz4750_early_console_setup()
148 dev->port.uartclk /= 2; in jz4750_early_console_setup()
298 uart.port.uartclk = clk_get_rate(data->clk_baud); in ingenic_uart_probe()
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| D | 8250_hp300.c | 116 port.uartclk = HPAPCI_BAUD_BASE * 16; in hp300_setup_serial_console()
133 port.uartclk = HPDCA_BAUD_BASE * 16; in hp300_setup_serial_console()
175 uart.port.uartclk = HPDCA_BAUD_BASE * 16; in hpdca_init_one()
257 uart.port.uartclk = HPAPCI_BAUD_BASE * 16; in hp300_8250_init()
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| /linux-6.12.1/drivers/tty/serial/ |
| D | earlycon.c | 123 char *uartclk; in parse_options() local
126 uartclk = strchr(options, ','); in parse_options()
127 if (uartclk && kstrtouint(uartclk + 1, 0, &port->uartclk) < 0) in parse_options()
148 if (!port->uartclk) in register_earlycon()
149 port->uartclk = BASE_BAUD * 16; in register_earlycon()
310 port->uartclk = be32_to_cpu(*val); in of_setup_earlycon()
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| D | xilinx_uartps.c | 206 struct clk *uartclk; member
580 calc_baud = cdns_uart_calc_baud_divs(port->uartclk, baud, &bdiv, &cd, in cdns_uart_set_baud_rate()
655 port->uartclk = ndata->new_rate; in cdns_uart_clk_notifier_cb()
836 minbaud = port->uartclk / in cdns_uart_set_termios()
838 maxbaud = port->uartclk / (CDNS_UART_BDIV_MIN + 1); in cdns_uart_set_termios()
1340 if (port->uartclk && device->baud) { in cdns_early_console_setup()
1345 cdns_uart_calc_baud_divs(port->uartclk, device->baud, in cdns_early_console_setup()
1520 ret = clk_enable(cdns_uart->uartclk); in cdns_uart_resume()
1544 clk_disable(cdns_uart->uartclk); in cdns_uart_resume()
1564 clk_disable(cdns_uart->uartclk); in cdns_runtime_suspend()
[all …]
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| D | mpc52xx_uart.c | 297 port->uartclk / (32 * 0xffff) + 1, in mpc5200_psc_set_baudrate()
298 port->uartclk / 32); in mpc5200_psc_set_baudrate()
299 divisor = (port->uartclk + 16 * baud) / (32 * baud); in mpc5200_psc_set_baudrate()
317 port->uartclk / (32 * 0xffff) + 1, in mpc5200b_psc_set_baudrate()
318 port->uartclk / 4); in mpc5200b_psc_set_baudrate()
319 divisor = (port->uartclk + 2 * baud) / (4 * baud); in mpc5200b_psc_set_baudrate()
556 port->uartclk / (16 * 0xffff) + 1, in mpc512x_psc_set_baudrate()
557 port->uartclk / 16); in mpc512x_psc_set_baudrate()
558 divisor = (port->uartclk + 8 * baud) / (16 * baud); in mpc512x_psc_set_baudrate()
894 port->uartclk / (16 * 0xffff) + 1, in mpc5125_psc_set_baudrate()
[all …]
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| D | 21285.c | 244 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); in serial21285_set_termios()
246 b = port->uartclk / (16 * quot); in serial21285_set_termios()
347 if (ser->baud_base != port->uartclk / 16) in serial21285_verify_port()
381 serial21285_port.uartclk = mem_fclk_21285 / 4; in serial21285_setup_ports()
431 *baud = port->uartclk / (16 * (tmp + 1)); in serial21285_get_options()
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| D | sccnxp.c | 311 div_std = DIV_ROUND_CLOSEST(port->uartclk, 2 * 16 * baud); in sccnxp_set_baud()
313 bestbaud = DIV_ROUND_CLOSEST(port->uartclk, 2 * 16 * div_std); in sccnxp_set_baud()
327 tmp_baud = DIV_ROUND_CLOSEST(port->uartclk, div_std); in sccnxp_set_baud()
888 int i, ret, uartclk; in sccnxp_probe() local
924 uartclk = 0; in sccnxp_probe()
926 uartclk = clk_get_rate(clk); in sccnxp_probe()
929 if (!uartclk) { in sccnxp_probe()
931 uartclk = s->chip->freq_std; in sccnxp_probe()
935 if ((uartclk < s->chip->freq_min) || (uartclk > s->chip->freq_max)) { in sccnxp_probe()
990 s->port[i].uartclk = uartclk; in sccnxp_probe()
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| D | max310x.c | 517 div = port->uartclk / baud; in max310x_set_baud()
536 frac = (16*(port->uartclk % F)) / F; in max310x_set_baud()
545 return (16*port->uartclk) / (c*(16*div + frac)); in max310x_set_baud()
994 port->uartclk / 16 / 0xffff, in max310x_set_termios()
995 port->uartclk / 4); in max310x_set_termios()
1259 s32 uartclk = 0; in max310x_probe() local
1273 device_property_read_u32(dev, "clock-frequency", &uartclk); in max310x_probe()
1289 freq = uartclk; in max310x_probe()
1346 uartclk = max310x_set_ref_clk(dev, s, freq, xtal); in max310x_probe()
1347 if (uartclk < 0) { in max310x_probe()
[all …]
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| /linux-6.12.1/arch/arm64/boot/dts/arm/ |
| D | corstone1000.dtsi | 86 uartclk: clock-50000000 { label
91 clock-output-names = "uartclk";
125 clocks = <&uartclk>, <&refclk100mhz>;
126 clock-names = "uartclk", "apb_pclk";
133 clocks = <&uartclk>, <&refclk100mhz>;
134 clock-names = "uartclk", "apb_pclk";
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| D | foundation-v8.dtsi | 205 clock-names = "uartclk", "apb_pclk";
213 clock-names = "uartclk", "apb_pclk";
221 clock-names = "uartclk", "apb_pclk";
229 clock-names = "uartclk", "apb_pclk";
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| D | rtsm_ve-motherboard.dtsi | 174 clock-names = "uartclk", "apb_pclk";
182 clock-names = "uartclk", "apb_pclk";
190 clock-names = "uartclk", "apb_pclk";
198 clock-names = "uartclk", "apb_pclk";
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| /linux-6.12.1/arch/arm/boot/dts/hisilicon/ |
| D | hi3519.dtsi | 56 clock-names = "uartclk", "apb_pclk";
65 clock-names = "uartclk", "apb_pclk";
74 clock-names = "uartclk", "apb_pclk";
83 clock-names = "uartclk", "apb_pclk";
92 clock-names = "uartclk", "apb_pclk";
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| /linux-6.12.1/arch/mips/ath25/ |
| D | devices.c | 74 void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) in ath25_serial_setup() argument
86 s.uartclk = uartclk; in ath25_serial_setup()
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| /linux-6.12.1/arch/arm/boot/dts/arm/ |
| D | arm-realview-eb.dtsi | 56 xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
333 clocks = <&uartclk>, <&pclk>;
334 clock-names = "uartclk", "apb_pclk";
340 clocks = <&uartclk>, <&pclk>;
341 clock-names = "uartclk", "apb_pclk";
347 clocks = <&uartclk>, <&pclk>;
348 clock-names = "uartclk", "apb_pclk";
354 clocks = <&uartclk>, <&pclk>;
355 clock-names = "uartclk", "apb_pclk";
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| D | arm-realview-pb1176.dts | 66 xtal24mhz: mclk: kmiclk: sspclk: uartclk: clock-24000000 {
389 clocks = <&uartclk>, <&pclk>;
390 clock-names = "uartclk", "apb_pclk";
398 clocks = <&uartclk>, <&pclk>;
399 clock-names = "uartclk", "apb_pclk";
407 clocks = <&uartclk>, <&pclk>;
408 clock-names = "uartclk", "apb_pclk";
416 clocks = <&uartclk>, <&pclk>;
417 clock-names = "uartclk", "apb_pclk";
525 clocks = <&uartclk>, <&pclk>;
[all …]
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| D | integratorcp.dts | 73 uartclk: clock-14745600 { label
249 clocks = <&uartclk>, <&pclk>;
250 clock-names = "uartclk", "apb_pclk";
255 clocks = <&uartclk>, <&pclk>;
256 clock-names = "uartclk", "apb_pclk";
279 clocks = <&uartclk>, <&pclk>;
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| D | arm-realview-pbx.dtsi | 65 xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 {
331 clocks = <&uartclk>, <&pclk>;
332 clock-names = "uartclk", "apb_pclk";
338 clocks = <&uartclk>, <&pclk>;
339 clock-names = "uartclk", "apb_pclk";
345 clocks = <&uartclk>, <&pclk>;
346 clock-names = "uartclk", "apb_pclk";
524 clocks = <&uartclk>, <&pclk>;
525 clock-names = "uartclk", "apb_pclk";
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| /linux-6.12.1/arch/mips/mti-malta/ |
| D | malta-platform.c | 34 .uartclk = 1843200, \
49 .uartclk = 3686400, /* Twice the usual clk! */
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| /linux-6.12.1/arch/arm/mach-footbridge/ |
| D | isa.c | 52 .uartclk = 1843200,
60 .uartclk = 1843200,
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| /linux-6.12.1/arch/mips/loongson2ef/common/ |
| D | serial.c | 25 .uartclk = clk, \
34 .uartclk = clk, \
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| /linux-6.12.1/arch/mips/boot/dts/mobileye/ |
| D | eyeq5.dtsi | 80 clock-names = "uartclk", "apb_pclk";
93 clock-names = "uartclk", "apb_pclk";
106 clock-names = "uartclk", "apb_pclk";
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| /linux-6.12.1/arch/mips/bcm47xx/ |
| D | serial.c | 44 p->uartclk = ssb_port->baud_base; in uart8250_init_ssb()
70 p->uartclk = bcma_port->baud_base; in uart8250_init_bcma()
|