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/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_wp.c145 struct omap_video_timings *timings) in hdmi_wp_video_config_interface() argument
151 vsync_pol = timings->vsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
152 hsync_pol = timings->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH; in hdmi_wp_video_config_interface()
157 r = FLD_MOD(r, timings->interlace, 3, 3); in hdmi_wp_video_config_interface()
163 struct omap_video_timings *timings) in hdmi_wp_video_config_timing() argument
170 timing_h |= FLD_VAL(timings->hbp, 31, 20); in hdmi_wp_video_config_timing()
171 timing_h |= FLD_VAL(timings->hfp, 19, 8); in hdmi_wp_video_config_timing()
172 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
175 timing_v |= FLD_VAL(timings->vbp, 31, 20); in hdmi_wp_video_config_timing()
176 timing_v |= FLD_VAL(timings->vfp, 19, 8); in hdmi_wp_video_config_timing()
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Dhdmi5_core.c284 video_cfg->v_fc_config.timings.hsync_level = cfg->timings.hsync_level; in hdmi_core_init()
285 video_cfg->v_fc_config.timings.x_res = cfg->timings.x_res; in hdmi_core_init()
286 video_cfg->v_fc_config.timings.hsw = cfg->timings.hsw - 1; in hdmi_core_init()
287 video_cfg->v_fc_config.timings.hbp = cfg->timings.hbp; in hdmi_core_init()
288 video_cfg->v_fc_config.timings.hfp = cfg->timings.hfp; in hdmi_core_init()
289 video_cfg->hblank = cfg->timings.hfp + in hdmi_core_init()
290 cfg->timings.hbp + cfg->timings.hsw - 1; in hdmi_core_init()
291 video_cfg->v_fc_config.timings.vsync_level = cfg->timings.vsync_level; in hdmi_core_init()
292 video_cfg->v_fc_config.timings.y_res = cfg->timings.y_res; in hdmi_core_init()
293 video_cfg->v_fc_config.timings.vsw = cfg->timings.vsw; in hdmi_core_init()
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/linux-6.12.1/drivers/video/fbdev/core/
Dfbmon.c1148 static void fb_timings_vfreq(struct __fb_timings *timings) in fb_timings_vfreq() argument
1150 timings->hfreq = fb_get_hfreq(timings->vfreq, timings->vactive); in fb_timings_vfreq()
1151 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_vfreq()
1152 timings->vtotal = timings->vactive + timings->vblank; in fb_timings_vfreq()
1153 timings->hblank = fb_get_hblank_by_hfreq(timings->hfreq, in fb_timings_vfreq()
1154 timings->hactive); in fb_timings_vfreq()
1155 timings->htotal = timings->hactive + timings->hblank; in fb_timings_vfreq()
1156 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_vfreq()
1159 static void fb_timings_hfreq(struct __fb_timings *timings) in fb_timings_hfreq() argument
1161 timings->vblank = fb_get_vblank(timings->hfreq); in fb_timings_hfreq()
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/linux-6.12.1/drivers/mtd/nand/raw/
Dnand_timings.c26 .timings.mode = 0,
27 .timings.sdr = {
71 .timings.mode = 1,
72 .timings.sdr = {
116 .timings.mode = 2,
117 .timings.sdr = {
161 .timings.mode = 3,
162 .timings.sdr = {
206 .timings.mode = 4,
207 .timings.sdr = {
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/linux-6.12.1/drivers/memory/tegra/
Dtegra210-emc-table.c16 struct tegra210_emc_timing *timings; in tegra210_emc_table_device_init() local
19 timings = memremap(rmem->base, rmem->size, MEMREMAP_WB); in tegra210_emc_table_device_init()
20 if (!timings) { in tegra210_emc_table_device_init()
26 if (timings[i].revision == 0) in tegra210_emc_table_device_init()
42 memunmap(timings); in tegra210_emc_table_device_init()
46 emc->derated = timings; in tegra210_emc_table_device_init()
49 emc->nominal = timings; in tegra210_emc_table_device_init()
54 rmem->priv = timings; in tegra210_emc_table_device_init()
62 struct tegra210_emc_timing *timings = rmem->priv; in tegra210_emc_table_device_release() local
65 if ((emc->nominal && timings != emc->nominal) && in tegra210_emc_table_device_release()
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/linux-6.12.1/drivers/media/i2c/adv748x/
Dadv748x-hdmi.c48 struct v4l2_dv_timings timings; member
96 fmt->field = hdmi->timings.bt.interlaced ? in adv748x_hdmi_fill_format()
102 fmt->width = hdmi->timings.bt.width; in adv748x_hdmi_fill_format()
103 fmt->height = hdmi->timings.bt.height; in adv748x_hdmi_fill_format()
109 static void adv748x_fill_optional_dv_timings(struct v4l2_dv_timings *timings) in adv748x_fill_optional_dv_timings() argument
111 v4l2_find_dv_timings_cap(timings, &adv748x_hdmi_timings_cap, in adv748x_fill_optional_dv_timings()
172 const struct v4l2_dv_timings *timings) in adv748x_hdmi_set_video_timings() argument
179 if (v4l2_match_dv_timings(timings, &stds[i].timings, 250000, in adv748x_hdmi_set_video_timings()
218 struct v4l2_dv_timings *timings) in adv748x_hdmi_s_dv_timings() argument
224 if (!timings) in adv748x_hdmi_s_dv_timings()
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/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/displays/
Dencoder-tfp410.c26 struct omap_video_timings timings; member
83 in->ops.dpi->set_timings(in, &ddata->timings); in tfp410_enable()
115 static void tfp410_fix_timings(struct omap_video_timings *timings) in tfp410_fix_timings() argument
117 timings->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
118 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE; in tfp410_fix_timings()
119 timings->de_level = OMAPDSS_SIG_ACTIVE_HIGH; in tfp410_fix_timings()
123 struct omap_video_timings *timings) in tfp410_set_timings() argument
128 tfp410_fix_timings(timings); in tfp410_set_timings()
130 ddata->timings = *timings; in tfp410_set_timings()
131 dssdev->panel.timings = *timings; in tfp410_set_timings()
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Dconnector-analog-tv.c22 struct omap_video_timings timings; member
85 in->ops.atv->set_timings(in, &ddata->timings); in tvc_enable()
119 struct omap_video_timings *timings) in tvc_set_timings() argument
124 ddata->timings = *timings; in tvc_set_timings()
125 dssdev->panel.timings = *timings; in tvc_set_timings()
127 in->ops.atv->set_timings(in, timings); in tvc_set_timings()
131 struct omap_video_timings *timings) in tvc_get_timings() argument
135 *timings = ddata->timings; in tvc_get_timings()
139 struct omap_video_timings *timings) in tvc_check_timings() argument
144 return in->ops.atv->check_timings(in, timings); in tvc_check_timings()
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Dconnector-hdmi.c43 struct omap_video_timings timings; member
90 in->ops.hdmi->set_timings(in, &ddata->timings); in hdmic_enable()
117 struct omap_video_timings *timings) in hdmic_set_timings() argument
122 ddata->timings = *timings; in hdmic_set_timings()
123 dssdev->panel.timings = *timings; in hdmic_set_timings()
125 in->ops.hdmi->set_timings(in, timings); in hdmic_set_timings()
129 struct omap_video_timings *timings) in hdmic_get_timings() argument
133 *timings = ddata->timings; in hdmic_get_timings()
137 struct omap_video_timings *timings) in hdmic_check_timings() argument
142 return in->ops.hdmi->check_timings(in, timings); in hdmic_check_timings()
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Dencoder-opa362.c28 struct omap_video_timings timings; member
91 in->ops.atv->set_timings(in, &ddata->timings); in opa362_enable()
124 struct omap_video_timings *timings) in opa362_set_timings() argument
131 ddata->timings = *timings; in opa362_set_timings()
132 dssdev->panel.timings = *timings; in opa362_set_timings()
134 in->ops.atv->set_timings(in, timings); in opa362_set_timings()
138 struct omap_video_timings *timings) in opa362_get_timings() argument
144 *timings = ddata->timings; in opa362_get_timings()
148 struct omap_video_timings *timings) in opa362_check_timings() argument
155 return in->ops.atv->check_timings(in, timings); in opa362_check_timings()
Dconnector-dvi.c43 struct omap_video_timings timings; member
84 in->ops.dvi->set_timings(in, &ddata->timings); in dvic_enable()
109 struct omap_video_timings *timings) in dvic_set_timings() argument
114 ddata->timings = *timings; in dvic_set_timings()
115 dssdev->panel.timings = *timings; in dvic_set_timings()
117 in->ops.dvi->set_timings(in, timings); in dvic_set_timings()
121 struct omap_video_timings *timings) in dvic_get_timings() argument
125 *timings = ddata->timings; in dvic_get_timings()
129 struct omap_video_timings *timings) in dvic_check_timings() argument
134 return in->ops.dvi->check_timings(in, timings); in dvic_check_timings()
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Dencoder-tpd12s015.c27 struct omap_video_timings timings; member
83 in->ops.hdmi->set_timings(in, &ddata->timings); in tpd_enable()
108 struct omap_video_timings *timings) in tpd_set_timings() argument
113 ddata->timings = *timings; in tpd_set_timings()
114 dssdev->panel.timings = *timings; in tpd_set_timings()
116 in->ops.hdmi->set_timings(in, timings); in tpd_set_timings()
120 struct omap_video_timings *timings) in tpd_get_timings() argument
124 *timings = ddata->timings; in tpd_get_timings()
128 struct omap_video_timings *timings) in tpd_check_timings() argument
134 r = in->ops.hdmi->check_timings(in, timings); in tpd_check_timings()
/linux-6.12.1/drivers/media/rc/
Drc-ir-raw.c317 const struct ir_raw_timings_manchester *timings, in ir_raw_gen_manchester() argument
326 if (timings->leader_pulse) { in ir_raw_gen_manchester()
329 init_ir_raw_event_duration((*ev), 1, timings->leader_pulse); in ir_raw_gen_manchester()
330 if (timings->leader_space) { in ir_raw_gen_manchester()
334 timings->leader_space); in ir_raw_gen_manchester()
344 if (timings->invert) in ir_raw_gen_manchester()
347 (*ev)->duration += timings->clock; in ir_raw_gen_manchester()
352 timings->clock); in ir_raw_gen_manchester()
358 timings->clock); in ir_raw_gen_manchester()
362 if (timings->trailer_space) { in ir_raw_gen_manchester()
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Dmeson-ir.c247 const struct meson_ir_protocol *timings; in meson_ir_hw_decoder_init() local
264 timings = &protocol_timings[i]; in meson_ir_hw_decoder_init()
286 regval = FIELD_PREP(IR_DEC_REG2_MODE, timings->hw_protocol); in meson_ir_hw_decoder_init()
291 timings->hold_code_enable ? in meson_ir_hw_decoder_init()
296 timings->bit_order ? IR_DEC_REG2_BIT_ORDER : 0); in meson_ir_hw_decoder_init()
300 timings->count_tick_mode ? in meson_ir_hw_decoder_init()
309 timings->repeat_counter_enable ? in meson_ir_hw_decoder_init()
312 timings->repeat_check_enable ? in meson_ir_hw_decoder_init()
315 timings->repeat_compare_enable ? in meson_ir_hw_decoder_init()
323 timings->frame_time_max); in meson_ir_hw_decoder_init()
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/linux-6.12.1/Documentation/driver-api/memory-devices/
Dti-gpmc.rst23 GPMC has certain timings that has to be programmed for proper
25 timings. To have peripheral work with gpmc, peripheral timings has to
28 dependency for certain gpmc timings on gpmc clock frequency. Hence a
31 Generic routine provides a generic method to calculate gpmc timings
32 from gpmc peripheral timings. struct gpmc_device_timings fields has to
33 be updated with timings from the datasheet of the peripheral that is
34 connected to gpmc. A few of the peripheral timings can be fed either
49 on understanding of gpmc timings, peripheral timings, available
54 gpmc timing dependency on peripheral timings:
172 Many of gpmc timings are dependent on other gpmc timings (a few
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/linux-6.12.1/drivers/media/pci/mgb4/
Dmgb4_vin.c139 struct v4l2_dv_timings *timings) in get_timings() argument
155 memset(timings, 0, sizeof(*timings)); in get_timings()
156 timings->type = V4L2_DV_BT_656_1120; in get_timings()
157 timings->bt.width = resolution >> 16; in get_timings()
158 timings->bt.height = resolution & 0xFFFF; in get_timings()
160 timings->bt.polarities |= V4L2_DV_HSYNC_POS_POL; in get_timings()
162 timings->bt.polarities |= V4L2_DV_VSYNC_POS_POL; in get_timings()
163 timings->bt.pixelclock = pclk * 1000; in get_timings()
164 timings->bt.hsync = (signal & 0x00FF0000) >> 16; in get_timings()
165 timings->bt.vsync = (signal2 & 0x00FF0000) >> 16; in get_timings()
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/linux-6.12.1/Documentation/fb/
Dviafb.modes31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode
75 geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode
96 geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode
117 geometry 640 480 640 480 32 timings 19081 104 40 31 1 64 3 endmode
138 geometry 720 480 720 480 32 timings 37202 88 16 14 1 72 3 endmode
159 geometry 800 480 800 480 32 timings 33805 96 24 10 3 72 7 endmode
180 geometry 720 576 720 576 32 timings 30611 96 24 17 1 72 3 endmode
202 timings 25000 88 40 23 1 128 4 hsync high vsync high endmode
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/linux-6.12.1/drivers/media/spi/
Dgs1662.c221 static int gs_status_format(u16 status, struct v4l2_dv_timings *timings) in gs_status_format() argument
228 *timings = reg_fmt[i].format; in gs_status_format()
236 static u16 get_register_timings(struct v4l2_dv_timings *timings) in get_register_timings() argument
241 if (v4l2_match_dv_timings(timings, &reg_fmt[i].format, 0, in get_register_timings()
255 struct v4l2_dv_timings *timings) in gs_s_dv_timings() argument
263 reg_value = get_register_timings(timings); in gs_s_dv_timings()
267 gs->current_timings = *timings; in gs_s_dv_timings()
272 struct v4l2_dv_timings *timings) in gs_g_dv_timings() argument
279 *timings = gs->current_timings; in gs_g_dv_timings()
284 struct v4l2_dv_timings *timings) in gs_query_dv_timings() argument
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/linux-6.12.1/Documentation/userspace-api/media/v4l/
Ddv-timings.rst3 .. _dv-timings:
10 and the corresponding video timings. Today there are many more different
13 extend the API to select the video timings for these interfaces. Since
16 set/get video timings at the input and output.
18 These ioctls deal with the detailed digital video timings that define
21 widths etc. The ``linux/v4l2-dv-timings.h`` header can be used to get
22 the timings of the formats in the :ref:`cea861` and :ref:`vesadmt`
25 To enumerate and query the attributes of the DV timings supported by a
29 DV timings for the device applications use the
31 current DV timings they use the
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Dvidioc-enum-dv-timings.rst13 VIDIOC_ENUM_DV_TIMINGS - VIDIOC_SUBDEV_ENUM_DV_TIMINGS - Enumerate supported Digital Video timings
38 While some DV receivers or transmitters support a wide range of timings,
39 others support only a limited number of timings. With this ioctl
40 applications can enumerate a list of known supported timings. Call
42 also supports other standards or even custom timings that are not in
45 To query the available timings, applications initialize the ``index``
51 DV timings, applications shall begin at index zero, incrementing by one
56 Drivers may enumerate a different set of DV timings after
59 When implemented by the driver DV timings of subdevices can be queried
61 subdevice node. The DV timings are specific to inputs (for DV receivers)
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Dvidioc-query-dv-timings.rst38 The hardware may be able to detect the current DV timings automatically,
42 the timings, it will fill in the timings structure.
46 Drivers shall *not* switch timings automatically if new
47 timings are detected. Instead, drivers should send the
50 The reason is that new timings usually mean different buffer sizes as
53 :ref:`VIDIOC_QUERY_DV_TIMINGS`, and if the detected timings are valid they
54 will have to stop streaming, set the new timings, allocate new buffers
57 If the timings could not be detected because there was no signal, then
62 capabilities), then the driver fills in whatever timings it could find
65 found timings with the hardware's capabilities in order to give more
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/linux-6.12.1/drivers/memory/samsung/
Dexynos5422-dmc.c170 const struct lpddr3_timings *timings; member
1052 val = dmc->timings->tRFC / clk_period_ps; in create_timings_aligned()
1053 val += dmc->timings->tRFC % clk_period_ps ? 1 : 0; in create_timings_aligned()
1058 val = dmc->timings->tRRD / clk_period_ps; in create_timings_aligned()
1059 val += dmc->timings->tRRD % clk_period_ps ? 1 : 0; in create_timings_aligned()
1064 val = dmc->timings->tRPab / clk_period_ps; in create_timings_aligned()
1065 val += dmc->timings->tRPab % clk_period_ps ? 1 : 0; in create_timings_aligned()
1070 val = dmc->timings->tRCD / clk_period_ps; in create_timings_aligned()
1071 val += dmc->timings->tRCD % clk_period_ps ? 1 : 0; in create_timings_aligned()
1076 val = dmc->timings->tRC / clk_period_ps; in create_timings_aligned()
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/linux-6.12.1/drivers/ata/
Dpata_it8213.c89 u8 timings[][2] = { { 0, 0 }, in it8213_set_piomode() local
109 master_data |= (timings[pio][0] << 12) | in it8213_set_piomode()
110 (timings[pio][1] << 8); in it8213_set_piomode()
120 slave_data |= (timings[pio][0] << 2) | timings[pio][1]; in it8213_set_piomode()
149 u8 timings[][2] = { { 0, 0 }, in it8213_set_dmamode() local
215 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); in it8213_set_dmamode()
222 (timings[pio][0] << 12) | in it8213_set_dmamode()
223 (timings[pio][1] << 8); in it8213_set_dmamode()
Dpata_efar.c100 u8 timings[][2] = { { 0, 0 }, in efar_set_piomode() local
122 master_data |= (timings[pio][0] << 12) | in efar_set_piomode()
123 (timings[pio][1] << 8); in efar_set_piomode()
134 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; in efar_set_piomode()
169 u8 timings[][2] = { { 0, 0 }, in efar_set_dmamode() local
220 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0); in efar_set_dmamode()
227 (timings[pio][0] << 12) | in efar_set_dmamode()
228 (timings[pio][1] << 8); in efar_set_dmamode()
/linux-6.12.1/drivers/media/i2c/
Dtvp7002.c319 struct v4l2_dv_timings timings; member
562 const struct v4l2_bt_timings *t = &tvp7002_timings[i].timings.bt; in tvp7002_s_dv_timings()
580 *dv_timings = device->current_timings->timings; in tvp7002_g_dv_timings()
616 const struct tvp7002_timings_definition *timings = tvp7002_timings; in tvp7002_query_dv() local
648 for (*index = 0; *index < NUM_TIMINGS; (*index)++, timings++) in tvp7002_query_dv()
649 if (lpfr == timings->lines_per_frame && in tvp7002_query_dv()
650 progressive == timings->progressive) { in tvp7002_query_dv()
651 if (timings->cpl_min == 0xffff) in tvp7002_query_dv()
653 if (cpln >= timings->cpl_min && cpln <= timings->cpl_max) in tvp7002_query_dv()
669 struct v4l2_dv_timings *timings) in tvp7002_query_dv_timings() argument
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