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Searched refs:timer_clk (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/drivers/clocksource/
Dmxs_timer.c162 static int __init mxs_clockevent_init(struct clk *timer_clk) in mxs_clockevent_init() argument
168 clk_get_rate(timer_clk), in mxs_clockevent_init()
188 static int __init mxs_clocksource_init(struct clk *timer_clk) in mxs_clocksource_init() argument
190 unsigned int c = clk_get_rate(timer_clk); in mxs_clocksource_init()
205 struct clk *timer_clk; in mxs_timer_init() local
211 timer_clk = of_clk_get(np, 0); in mxs_timer_init()
212 if (IS_ERR(timer_clk)) { in mxs_timer_init()
214 return PTR_ERR(timer_clk); in mxs_timer_init()
217 ret = clk_prepare_enable(timer_clk); in mxs_timer_init()
257 ret = mxs_clocksource_init(timer_clk); in mxs_timer_init()
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Ddw_apb_timer_of.c20 struct clk *timer_clk; in timer_get_base_and_rate() local
54 timer_clk = of_clk_get_by_name(np, "timer"); in timer_get_base_and_rate()
55 if (IS_ERR(timer_clk)) { in timer_get_base_and_rate()
56 ret = PTR_ERR(timer_clk); in timer_get_base_and_rate()
60 ret = clk_prepare_enable(timer_clk); in timer_get_base_and_rate()
64 *rate = clk_get_rate(timer_clk); in timer_get_base_and_rate()
73 clk_disable_unprepare(timer_clk); in timer_get_base_and_rate()
75 clk_put(timer_clk); in timer_get_base_and_rate()
Dtimer-armada-370-xp.c77 static unsigned int timer_clk; variable
194 clockevents_config_and_register(evt, timer_clk, 1, 0xfffffffe); in armada_370_xp_timer_starting_cpu()
273 ticks_per_jiffy = (timer_clk + HZ / 2) / HZ; in armada_370_xp_timer_common_init()
286 armada_370_delay_timer.freq = timer_clk; in armada_370_xp_timer_common_init()
292 sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk); in armada_370_xp_timer_common_init()
296 timer_clk, 300, 32, clocksource_mmio_readl_down); in armada_370_xp_timer_common_init()
347 timer_clk = clk_get_rate(clk); in armada_xp_timer_init()
364 timer_clk = clk_get_rate(clk); in armada_375_timer_init()
383 timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; in armada_375_timer_init()
407 timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; in armada_370_timer_init()
Dtimer-rockchip.c130 struct clk *timer_clk; in rk_timer_probe() local
160 timer_clk = of_clk_get_by_name(np, "timer"); in rk_timer_probe()
161 if (IS_ERR(timer_clk)) { in rk_timer_probe()
162 ret = PTR_ERR(timer_clk); in rk_timer_probe()
167 ret = clk_prepare_enable(timer_clk); in rk_timer_probe()
172 timer->clk = timer_clk; in rk_timer_probe()
174 timer->freq = clk_get_rate(timer_clk); in rk_timer_probe()
189 clk_disable_unprepare(timer_clk); in rk_timer_probe()
/linux-6.12.1/arch/arm/boot/dts/nspire/
Dnspire.dtsi38 timer_clk: timer_clk { label
157 clocks = <&timer_clk>, <&timer_clk>,
158 <&timer_clk>;
166 clocks = <&timer_clk>, <&timer_clk>,
167 <&timer_clk>;
/linux-6.12.1/Documentation/devicetree/bindings/timer/
Dlsi,zevio-timer.txt24 clocks = <&timer_clk>;
32 clocks = <&timer_clk>;
/linux-6.12.1/arch/mips/boot/dts/mobileye/
Deyeq5-clocks.dtsi188 timer_clk: timer-clk { label
194 clock-output-names = "timer_clk";
/linux-6.12.1/drivers/clk/actions/
Dowl-s500.c193 static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
418 &timer_clk.common,
478 [CLK_TIMER] = &timer_clk.common.hw,
Dowl-s900.c218 static OWL_GATE(timer_clk, "timer_clk", "hosc", CMU_DEVCLKEN1, 27, 0, 0);
526 &timer_clk.common,
619 [CLK_TIMER] = &timer_clk.common.hw,