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Searched refs:tc_cfg (Results 1 – 14 of 14) sorted by relevance

/linux-6.12.1/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_dcb.c155 struct qlcnic_dcb_tc_cfg tc_cfg[QLC_DCB_MAX_TC]; member
659 struct qlcnic_dcb_tc_cfg *tc_cfg; in qlcnic_dcb_fill_cee_tc_params() local
664 tc_cfg = &type->tc_cfg[tc]; in qlcnic_dcb_fill_cee_tc_params()
665 tc_cfg->valid = true; in qlcnic_dcb_fill_cee_tc_params()
666 tc_cfg->up_tc_map |= QLC_DCB_GET_MAP(i); in qlcnic_dcb_fill_cee_tc_params()
670 tc_cfg->prio_cfg[i].valid = true; in qlcnic_dcb_fill_cee_tc_params()
671 tc_cfg->prio_cfg[i].pfc_type = QLC_PFC_FULL; in qlcnic_dcb_fill_cee_tc_params()
679 tc_cfg->pgid = pgid; in qlcnic_dcb_fill_cee_tc_params()
681 tc_cfg->prio_type = QLC_PRIO_LINK; in qlcnic_dcb_fill_cee_tc_params()
682 type->pg_cfg[tc_cfg->pgid].prio_count++; in qlcnic_dcb_fill_cee_tc_params()
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/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_encoder_phys_cmd.c337 struct dpu_hw_tear_check tc_cfg = { 0 }; in dpu_encoder_phys_cmd_tearcheck_config() local
377 tc_cfg.vsync_count = vsync_hz / in dpu_encoder_phys_cmd_tearcheck_config()
384 tc_cfg.hw_vsync_mode = 1; in dpu_encoder_phys_cmd_tearcheck_config()
385 tc_cfg.sync_cfg_height = mode->vtotal * 2; in dpu_encoder_phys_cmd_tearcheck_config()
386 tc_cfg.vsync_init_val = mode->vdisplay; in dpu_encoder_phys_cmd_tearcheck_config()
387 tc_cfg.sync_threshold_start = DEFAULT_TEARCHECK_SYNC_THRESH_START; in dpu_encoder_phys_cmd_tearcheck_config()
388 tc_cfg.sync_threshold_continue = DEFAULT_TEARCHECK_SYNC_THRESH_CONTINUE; in dpu_encoder_phys_cmd_tearcheck_config()
389 tc_cfg.start_pos = mode->vdisplay; in dpu_encoder_phys_cmd_tearcheck_config()
390 tc_cfg.rd_ptr_irq = mode->vdisplay + 1; in dpu_encoder_phys_cmd_tearcheck_config()
397 tc_enable, tc_cfg.start_pos, tc_cfg.rd_ptr_irq); in dpu_encoder_phys_cmd_tearcheck_config()
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/linux-6.12.1/drivers/net/ethernet/intel/ice/
Dice_lib.c995 if (!vsi->tc_cfg.numtc) { in ice_vsi_setup_q_map()
997 vsi->tc_cfg.numtc = 1; in ice_vsi_setup_q_map()
998 vsi->tc_cfg.ena_tc = 1; in ice_vsi_setup_q_map()
1001 num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC); in ice_vsi_setup_q_map()
1004 num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc; in ice_vsi_setup_q_map()
1023 if (!(vsi->tc_cfg.ena_tc & BIT(i))) { in ice_vsi_setup_q_map()
1025 vsi->tc_cfg.tc_info[i].qoffset = 0; in ice_vsi_setup_q_map()
1026 vsi->tc_cfg.tc_info[i].qcount_rx = 1; in ice_vsi_setup_q_map()
1027 vsi->tc_cfg.tc_info[i].qcount_tx = 1; in ice_vsi_setup_q_map()
1028 vsi->tc_cfg.tc_info[i].netdev_tc = 0; in ice_vsi_setup_q_map()
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Dice_dcb_lib.c43 if (vsi->tc_cfg.ena_tc & BIT(i)) in ice_is_pfc_causing_hung_q()
48 if (ice_find_q_in_range(vsi->tc_cfg.tc_info[tc].qoffset, in ice_is_pfc_causing_hung_q()
49 vsi->tc_cfg.tc_info[tc + 1].qoffset, in ice_is_pfc_causing_hung_q()
186 vsi->tc_cfg.ena_tc = ice_dcb_get_ena_tc(cfg); in ice_vsi_set_dcb_tc_cfg()
187 vsi->tc_cfg.numtc = ice_dcb_get_num_tc(cfg); in ice_vsi_set_dcb_tc_cfg()
191 vsi->tc_cfg.ena_tc = BIT(ice_get_first_droptc(vsi)); in ice_vsi_set_dcb_tc_cfg()
192 vsi->tc_cfg.numtc = 1; in ice_vsi_set_dcb_tc_cfg()
197 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; in ice_vsi_set_dcb_tc_cfg()
198 vsi->tc_cfg.numtc = 1; in ice_vsi_set_dcb_tc_cfg()
237 if (!(vsi->tc_cfg.ena_tc & BIT(n))) in ice_vsi_cfg_dcb_rings()
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Dice_dcb_lib.h71 vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS; in ice_vsi_set_dcb_tc_cfg()
72 vsi->tc_cfg.numtc = 1; in ice_vsi_set_dcb_tc_cfg()
Dice.h410 struct ice_tc_cfg tc_cfg; member
908 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && in ice_is_adq_active()
Dice_idc.c90 status = ice_cfg_vsi_rdma(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, in ice_add_rdma_qset()
Dice_main.c2811 for (i = 0; i < vsi->tc_cfg.numtc; i++) in ice_prepare_xdp_rings()
2814 status = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, in ice_prepare_xdp_rings()
2920 for (i = 0; i < vsi->tc_cfg.numtc; i++) in ice_destroy_xdp_rings()
2926 return ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc, in ice_destroy_xdp_rings()
4159 if (vsi->tc_cfg.ena_tc & BIT(i)) in ice_vsi_recfg_qs()
4161 vsi->tc_cfg.tc_info[i].netdev_tc, in ice_vsi_recfg_qs()
4162 vsi->tc_cfg.tc_info[i].qcount_tx, in ice_vsi_recfg_qs()
4163 vsi->tc_cfg.tc_info[i].qoffset); in ice_vsi_recfg_qs()
4687 ice_vsi_cfg_netdev_tc(vsi, vsi->tc_cfg.ena_tc); in ice_cfg_netdev()
7437 ice_vsi_cfg_netdev_tc(vsi, vsi->tc_cfg.ena_tc); in ice_vsi_open()
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Dice_ethtool.c3972 if (new_rx < vsi->tc_cfg.numtc) { in ice_set_channels()
3974 vsi->tc_cfg.numtc); in ice_set_channels()
3977 if (new_tx < vsi->tc_cfg.numtc) { in ice_set_channels()
3979 vsi->tc_cfg.numtc); in ice_set_channels()
Dice_base.c259 return ring->q_index - vsi->tc_cfg.tc_info[tc].qoffset; in ice_calc_txq_handle()
Dice_vf_lib.c481 vsi->idx, vsi->tc_cfg.ena_tc); in ice_vf_rebuild_aggregator_node_cfg()
Dice_dcb_nl.c1070 if (tc_map & vsi->tc_cfg.ena_tc) { in ice_dcbnl_set_all()
/linux-6.12.1/drivers/counter/
Dmicrochip-tcb-capture.c25 const struct atmel_tcb_config *tc_cfg; member
100 if (!priv->tc_cfg->has_gclk) in mchp_tc_count_function_write()
109 if (!priv->tc_cfg->has_qdec) in mchp_tc_count_function_write()
371 priv->tc_cfg = tcb_config; in mchp_tc_probe()
/linux-6.12.1/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_main.c1275 u32 tc_cfg; in hns_dsaf_inode_init() local
1279 tc_cfg = HNS_DSAF_I4TC_CFG; in hns_dsaf_inode_init()
1281 tc_cfg = HNS_DSAF_I8TC_CFG; in hns_dsaf_inode_init()
1316 dsaf_write_dev(dsaf_dev, reg, tc_cfg); in hns_dsaf_inode_init()