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Searched refs:t1_t3 (Results 1 – 5 of 5) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_pps.c1327 seq->t1_t3 = REG_FIELD_GET(PANEL_POWER_UP_DELAY_MASK, pp_on); in intel_pps_readout_hw_state()
1352 seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12); in intel_pps_dump_state()
1364 if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || in intel_pps_verify_state()
1374 return delays->t1_t3 || delays->t8 || delays->t9 || in pps_delays_valid()
1434 spec->t1_t3 = 210 * 10; in pps_init_delays_spec()
1468 assign_final(t1_t3); in pps_init_delays()
1476 intel_dp->pps.panel_power_up_delay = get_delay(t1_t3); in pps_init_delays()
1551 pp_on = REG_FIELD_PREP(PANEL_POWER_UP_DELAY_MASK, seq->t1_t3) | in pps_init_registers()
Dintel_bios.h54 u16 t1_t3; member
/linux-6.12.1/drivers/gpu/drm/gma500/
Dintel_bios.h445 u16 t1_t3; member
Dcdv_intel_dp.c2033 cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >> in cdv_intel_dp_init()
2049 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12); in cdv_intel_dp_init()
2052 intel_dp->panel_power_up_delay = cur.t1_t3 / 10; in cdv_intel_dp_init()
Dintel_bios.c84 dev_priv->edp.pps.t1_t3, dev_priv->edp.pps.t8, in parse_edp()