Searched refs:syscon_base (Results 1 – 3 of 3) sorted by relevance
58 void __iomem *syscon_base; member108 return ioread32(stfcamss->syscon_base + reg); in stf_syscon_reg_read()114 iowrite32(val, stfcamss->syscon_base + reg); in stf_syscon_reg_write()122 value = ioread32(stfcamss->syscon_base + reg); in stf_syscon_reg_set_bit()123 iowrite32(value | bit_mask, stfcamss->syscon_base + reg); in stf_syscon_reg_set_bit()131 value = ioread32(stfcamss->syscon_base + reg); in stf_syscon_reg_clear_bit()132 iowrite32(value & ~bit_mask, stfcamss->syscon_base + reg); in stf_syscon_reg_clear_bit()
48 stfcamss->syscon_base = in stfcamss_get_mem_res()50 if (IS_ERR(stfcamss->syscon_base)) in stfcamss_get_mem_res()51 return PTR_ERR(stfcamss->syscon_base); in stfcamss_get_mem_res()
21 void __iomem *syscon_base; member61 clkdata->syscon_base = of_iomap(np, 0); in of_artpec6_clkctrl_setup()62 BUG_ON(clkdata->syscon_base == NULL); in of_artpec6_clkctrl_setup()65 pll_mode = (readl(clkdata->syscon_base) >> 6) & 3; in of_artpec6_clkctrl_setup()182 clkdata->syscon_base + 0x14, i, 1, in artpec6_clkctrl_probe()186 muxreg = readl(clkdata->syscon_base + 0x14); in artpec6_clkctrl_probe()188 writel(muxreg, clkdata->syscon_base + 0x14); in artpec6_clkctrl_probe()195 muxreg = readl(clkdata->syscon_base + 0x14); in artpec6_clkctrl_probe()197 writel(muxreg, clkdata->syscon_base + 0x14); in artpec6_clkctrl_probe()