| /linux-6.12.1/drivers/net/ethernet/fungible/funcore/ |
| D | fun_hci.h | 131 __u8 type; member
138 .type = (_type), .id = cpu_to_be32(_id), \
151 __u8 subop; member
159 .subop = (_subop), .flags = cpu_to_be16(_flags), \
185 __u8 subop; member
215 __u8 subop; member
242 __u8 subop; member
259 .subop = (_subop), .flags = cpu_to_be16(_flags), \
276 .subop = (_subop), .flags = cpu_to_be16(_flags), \
297 __u8 subop; member
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| /linux-6.12.1/drivers/mtd/nand/raw/ |
| D | vf610_nfc.c | 348 vf610_get_next_instr(const struct nand_subop *subop, int *op_id) in vf610_get_next_instr() argument
350 if (*op_id + 1 >= subop->ninstrs) in vf610_get_next_instr()
355 return &subop->instrs[*op_id]; in vf610_get_next_instr()
359 const struct nand_subop *subop) in vf610_nfc_cmd() argument
373 instr = vf610_get_next_instr(subop, &op_id); in vf610_nfc_cmd()
377 if (instr && instr->type == NAND_OP_CMD_INSTR) { in vf610_nfc_cmd()
381 instr = vf610_get_next_instr(subop, &op_id); in vf610_nfc_cmd()
384 if (instr && instr->type == NAND_OP_ADDR_INSTR) { in vf610_nfc_cmd()
385 int naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in vf610_nfc_cmd()
386 int i = nand_subop_get_addr_start_off(subop, op_id); in vf610_nfc_cmd()
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| D | arasan-nand-controller.c | 596 const struct nand_subop *subop, in anfc_parse_instructions() argument
610 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in anfc_parse_instructions()
615 instr = &subop->instrs[op_id]; in anfc_parse_instructions()
617 switch (instr->type) { in anfc_parse_instructions()
628 offset = nand_subop_get_addr_start_off(subop, op_id); in anfc_parse_instructions()
629 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in anfc_parse_instructions()
645 offset = nand_subop_get_data_start_off(subop, op_id); in anfc_parse_instructions()
648 nfc_op->len = nand_subop_get_data_len(subop, op_id); in anfc_parse_instructions()
724 const struct nand_subop *subop, in anfc_misc_data_type_exec() argument
731 ret = anfc_parse_instructions(chip, subop, &nfc_op); in anfc_misc_data_type_exec()
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| D | nand_base.c | 936 iface->type = NAND_SDR_IFACE; in nand_choose_best_sdr_timings()
987 iface->type = NAND_NVDDR_IFACE; in nand_choose_best_nvddr_timings()
2306 struct nand_subop subop; member
2334 switch (pat->type) { in nand_op_parser_must_split_instr()
2380 unsigned int instr_offset = ctx->subop.first_instr_start_off; in nand_op_parser_match_pat()
2382 const struct nand_op_instr *instr = ctx->subop.instrs; in nand_op_parser_match_pat()
2393 if (instr->type != pat->elems[i].type) { in nand_op_parser_match_pat()
2443 ctx->subop.ninstrs = ninstrs; in nand_op_parser_match_pat()
2444 ctx->subop.last_instr_end_off = instr_offset; in nand_op_parser_match_pat()
2456 pr_debug("executing subop (CS%d):\n", ctx->subop.cs); in nand_op_parser_trace()
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| D | marvell_nand.c | 1710 const struct nand_subop *subop, in marvell_nfc_parse_instructions() argument
1722 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in marvell_nfc_parse_instructions()
1727 instr = &subop->instrs[op_id]; in marvell_nfc_parse_instructions()
1729 switch (instr->type) { in marvell_nfc_parse_instructions()
1744 offset = nand_subop_get_addr_start_off(subop, op_id); in marvell_nfc_parse_instructions()
1745 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in marvell_nfc_parse_instructions()
1771 len = nand_subop_get_data_len(subop, op_id); in marvell_nfc_parse_instructions()
1785 len = nand_subop_get_data_len(subop, op_id); in marvell_nfc_parse_instructions()
1800 const struct nand_subop *subop, in marvell_nfc_xfer_data_pio() argument
1806 unsigned int len = nand_subop_get_data_len(subop, op_id); in marvell_nfc_xfer_data_pio()
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| D | rockchip-nand-controller.c | 132 enum nfc_type type; member
332 const struct nand_subop *subop) in rk_nfc_cmd() argument
342 for (i = 0; i < subop->ninstrs; i++) { in rk_nfc_cmd()
343 const struct nand_op_instr *instr = &subop->instrs[i]; in rk_nfc_cmd()
345 switch (instr->type) { in rk_nfc_cmd()
352 remaining = nand_subop_get_num_addr_cyc(subop, i); in rk_nfc_cmd()
353 start = nand_subop_get_addr_start_off(subop, i); in rk_nfc_cmd()
362 start = nand_subop_get_data_start_off(subop, i); in rk_nfc_cmd()
363 cnt = nand_subop_get_data_len(subop, i); in rk_nfc_cmd()
365 if (instr->type == NAND_OP_DATA_OUT_INSTR) { in rk_nfc_cmd()
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| D | tegra_nand.c | 351 const struct nand_subop *subop) in tegra_nand_cmd() argument
361 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in tegra_nand_cmd()
366 instr = &subop->instrs[op_id]; in tegra_nand_cmd()
368 switch (instr->type) { in tegra_nand_cmd()
383 offset = nand_subop_get_addr_start_off(subop, op_id); in tegra_nand_cmd()
384 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in tegra_nand_cmd()
399 size = nand_subop_get_data_len(subop, op_id); in tegra_nand_cmd()
400 offset = nand_subop_get_data_start_off(subop, op_id); in tegra_nand_cmd()
409 size = nand_subop_get_data_len(subop, op_id); in tegra_nand_cmd()
410 offset = nand_subop_get_data_start_off(subop, op_id); in tegra_nand_cmd()
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| D | cadence-nand-controller.c | 2039 const struct nand_subop *subop) in cadence_nand_cmd_opcode() argument
2048 instr = &subop->instrs[op_id]; in cadence_nand_cmd_opcode()
2069 const struct nand_subop *subop) in cadence_nand_cmd_address() argument
2082 instr = &subop->instrs[op_id]; in cadence_nand_cmd_address()
2090 offset = nand_subop_get_addr_start_off(subop, op_id); in cadence_nand_cmd_address()
2091 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in cadence_nand_cmd_address()
2112 const struct nand_subop *subop) in cadence_nand_cmd_erase() argument
2116 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_ERASE1) { in cadence_nand_cmd_erase()
2123 instr = &subop->instrs[1]; in cadence_nand_cmd_erase()
2124 offset = nand_subop_get_addr_start_off(subop, 1); in cadence_nand_cmd_erase()
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| D | pl35x-nand-controller.c | 663 const struct nand_subop *subop) in pl35x_nand_exec_op() argument
675 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in pl35x_nand_exec_op()
676 instr = &subop->instrs[op_id]; in pl35x_nand_exec_op()
678 switch (instr->type) { in pl35x_nand_exec_op()
691 offset = nand_subop_get_addr_start_off(subop, op_id); in pl35x_nand_exec_op()
692 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in pl35x_nand_exec_op()
707 len = nand_subop_get_data_len(subop, op_id); in pl35x_nand_exec_op()
716 last_instr_type = instr->type; in pl35x_nand_exec_op()
727 if (data_instr && data_instr->type == NAND_OP_DATA_OUT_INSTR) { in pl35x_nand_exec_op()
744 if (data_instr && data_instr->type == NAND_OP_DATA_IN_INSTR) in pl35x_nand_exec_op()
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| D | qcom_nandc.c | 2593 const struct nand_subop *subop, in qcom_parse_instructions() argument
2600 for (op_id = 0; op_id < subop->ninstrs; op_id++) { in qcom_parse_instructions()
2604 instr = &subop->instrs[op_id]; in qcom_parse_instructions()
2606 switch (instr->type) { in qcom_parse_instructions()
2617 offset = nand_subop_get_addr_start_off(subop, op_id); in qcom_parse_instructions()
2618 naddrs = nand_subop_get_num_addr_cyc(subop, op_id); in qcom_parse_instructions()
2681 const struct nand_subop *subop) in qcom_read_status_exec() argument
2695 ret = qcom_parse_instructions(chip, subop, &q_op); in qcom_read_status_exec()
2738 len = nand_subop_get_data_len(subop, op_id); in qcom_read_status_exec()
2745 static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subop *subop) in qcom_read_id_type_exec() argument
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| D | sunxi_nand.c | 1765 const struct nand_subop *subop) in sunxi_nfc_exec_subop() argument
1773 for (i = 0; i < subop->ninstrs; i++) { in sunxi_nfc_exec_subop()
1774 const struct nand_op_instr *instr = &subop->instrs[i]; in sunxi_nfc_exec_subop()
1776 switch (instr->type) { in sunxi_nfc_exec_subop()
1791 remaining = nand_subop_get_num_addr_cyc(subop, i); in sunxi_nfc_exec_subop()
1792 start = nand_subop_get_addr_start_off(subop, i); in sunxi_nfc_exec_subop()
1806 start = nand_subop_get_data_start_off(subop, i); in sunxi_nfc_exec_subop()
1807 remaining = nand_subop_get_data_len(subop, i); in sunxi_nfc_exec_subop()
1811 if (instr->type == NAND_OP_DATA_OUT_INSTR) { in sunxi_nfc_exec_subop()
1861 const struct nand_subop *subop) in sunxi_nfc_soft_waitrdy() argument
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| /linux-6.12.1/drivers/acpi/acpica/ |
| D | psargs.c | 240 possible_method_call && (node->type == ACPI_TYPE_METHOD)) { in acpi_ps_get_next_namepath()
745 u32 subop; in acpi_ps_get_next_arg() local
843 subop = acpi_ps_peek_opcode(parser_state); in acpi_ps_get_next_arg()
844 if (subop == 0 || in acpi_ps_get_next_arg()
845 acpi_ps_is_leading_char(subop) || in acpi_ps_get_next_arg()
846 ACPI_IS_ROOT_PREFIX(subop) || in acpi_ps_get_next_arg()
847 ACPI_IS_PARENT_PREFIX(subop)) { in acpi_ps_get_next_arg()
881 subop = acpi_ps_peek_opcode(parser_state); in acpi_ps_get_next_arg()
882 if (subop == 0 || in acpi_ps_get_next_arg()
883 acpi_ps_is_leading_char(subop) || in acpi_ps_get_next_arg()
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| /linux-6.12.1/include/linux/mtd/ |
| D | rawnand.h | 612 enum nand_interface_type type; member
628 return conf->type == NAND_SDR_IFACE; in nand_interface_is_sdr()
637 return conf->type == NAND_NVDDR_IFACE; in nand_interface_is_nvddr()
745 enum nand_op_instr_type type; member
778 .type = NAND_OP_CMD_INSTR, \
785 .type = NAND_OP_ADDR_INSTR, \
795 .type = NAND_OP_DATA_IN_INSTR, \
806 .type = NAND_OP_DATA_OUT_INSTR, \
817 .type = NAND_OP_DATA_IN_INSTR, \
828 .type = NAND_OP_DATA_OUT_INSTR, \
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| /linux-6.12.1/drivers/mtd/nand/raw/atmel/ |
| D | nand-controller.c | 141 enum atmel_nand_rb_type type; member
521 if (nand->activecs->rb.type == ATMEL_NAND_NO_RB) in atmel_nand_waitrdy()
534 if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB) in atmel_hsmc_nand_waitrdy()
580 switch (instr->type) { in atmel_smc_nand_exec_instr()
633 const struct nand_subop *subop) in atmel_hsmc_exec_cmd_addr() argument
642 for (i = 0; i < subop->ninstrs; i++) { in atmel_hsmc_exec_cmd_addr()
643 const struct nand_op_instr *instr = &subop->instrs[i]; in atmel_hsmc_exec_cmd_addr()
645 if (instr->type == NAND_OP_CMD_INSTR) { in atmel_hsmc_exec_cmd_addr()
650 for (j = nand_subop_get_addr_start_off(subop, i); in atmel_hsmc_exec_cmd_addr()
651 j < nand_subop_get_num_addr_cyc(subop, i); j++) { in atmel_hsmc_exec_cmd_addr()
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