Home
last modified time | relevance | path

Searched refs:set_bits (Results 1 – 25 of 50) sorted by relevance

12

/linux-6.12.1/tools/perf/bench/
Dfind-bit-bench.c63 unsigned int set_bits, skip; in do_for_each_set_bit() local
68 for (set_bits = 1; set_bits <= num_bits; set_bits <<= 1) { in do_for_each_set_bit()
70 skip = num_bits / set_bits; in do_for_each_set_bit()
85 assert(old + (inner_iterations * set_bits) == accumulator); in do_for_each_set_bit()
101 assert(old + (inner_iterations * set_bits) == accumulator); in do_for_each_set_bit()
108 inner_iterations, set_bits, num_bits); in do_for_each_set_bit()
/linux-6.12.1/drivers/gpu/drm/xe/
Dxe_reg_sr.c76 if (e1->clr_bits & e2->clr_bits || e1->set_bits & e2->set_bits || in compatible_entries()
77 e1->clr_bits & e2->set_bits || e1->set_bits & e2->clr_bits) in compatible_entries()
108 pentry->set_bits |= e->set_bits; in xe_reg_sr_add()
130 idx, e->clr_bits, e->set_bits, in xe_reg_sr_add()
176 val |= entry->set_bits; in apply_one_mmio()
245 reg | entry->set_bits); in xe_reg_sr_apply_whitelist()
281 reg, entry->clr_bits, entry->set_bits, in xe_reg_sr_dump()
Dxe_rtp.h244 .clr_bits = ~0u, .set_bits = (val_), \
262 .clr_bits = val_, .set_bits = val_, \
280 .clr_bits = val_, .set_bits = 0, \
297 .clr_bits = mask_bits_, .set_bits = val_, \
302 .clr_bits = (mask_bits_), .set_bits = (val_), \
317 .set_bits = val_, \
Dxe_reg_sr_types.h17 u32 set_bits; member
Dxe_rtp_types.h31 u32 set_bits; member
Dxe_rtp.c151 .set_bits = action->set_bits, in rtp_add_sr_entry()
Dxe_reg_whitelist.c119 u32 val = entry->set_bits; in xe_reg_whitelist_print_entry()
/linux-6.12.1/drivers/media/platform/ti/omap3isp/
Disp.h331 u32 reg, u32 set_bits) in isp_reg_set() argument
335 isp_reg_writel(isp, v | set_bits, mmio_range, reg); in isp_reg_set()
350 u32 reg, u32 clr_bits, u32 set_bits) in isp_reg_clr_set() argument
354 isp_reg_writel(isp, (v & ~clr_bits) | set_bits, mmio_range, reg); in isp_reg_clr_set()
/linux-6.12.1/drivers/gpu/drm/sprd/
Dsprd_dpu.h75 dpu_reg_set(struct dpu_context *ctx, u32 offset, u32 set_bits) in dpu_reg_set() argument
79 writel(bits | set_bits, ctx->base + offset); in dpu_reg_set()
/linux-6.12.1/fs/netfs/
Dfscache_io.c168 bool set_bits; member
203 wreq->set_bits); in fscache_wreq_done()
236 wreq->set_bits = cond; in __fscache_write_to_cache()
/linux-6.12.1/drivers/tty/serial/
Dip22zilog.c545 unsigned char set_bits, clear_bits; in ip22zilog_set_mctrl() local
547 set_bits = clear_bits = 0; in ip22zilog_set_mctrl()
550 set_bits |= RTS; in ip22zilog_set_mctrl()
554 set_bits |= DTR; in ip22zilog_set_mctrl()
559 up->curregs[R5] |= set_bits; in ip22zilog_set_mctrl()
655 unsigned char set_bits, clear_bits, new_reg; in ip22zilog_break_ctl() local
658 set_bits = clear_bits = 0; in ip22zilog_break_ctl()
661 set_bits |= SND_BRK; in ip22zilog_break_ctl()
667 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in ip22zilog_break_ctl()
Dpmac_zilog.c516 unsigned char set_bits, clear_bits; in pmz_set_mctrl() local
525 set_bits = clear_bits = 0; in pmz_set_mctrl()
529 set_bits |= RTS; in pmz_set_mctrl()
534 set_bits |= DTR; in pmz_set_mctrl()
539 uap->curregs[R5] |= set_bits; in pmz_set_mctrl()
544 set_bits, clear_bits, uap->curregs[R5]); in pmz_set_mctrl()
664 unsigned char set_bits, clear_bits, new_reg; in pmz_break_ctl() local
667 set_bits = clear_bits = 0; in pmz_break_ctl()
670 set_bits |= SND_BRK; in pmz_break_ctl()
676 new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits; in pmz_break_ctl()
Dsunzilog.c646 unsigned char set_bits, clear_bits; in sunzilog_set_mctrl() local
648 set_bits = clear_bits = 0; in sunzilog_set_mctrl()
651 set_bits |= RTS; in sunzilog_set_mctrl()
655 set_bits |= DTR; in sunzilog_set_mctrl()
660 up->curregs[R5] |= set_bits; in sunzilog_set_mctrl()
756 unsigned char set_bits, clear_bits, new_reg; in sunzilog_break_ctl() local
759 set_bits = clear_bits = 0; in sunzilog_break_ctl()
762 set_bits |= SND_BRK; in sunzilog_break_ctl()
768 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in sunzilog_break_ctl()
/linux-6.12.1/arch/arm/mach-omap2/
Domap-secure.c190 u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits) in rx51_secure_update_aux_cr() argument
197 acr |= set_bits; in rx51_secure_update_aux_cr()
Domap-secure.h77 extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
/linux-6.12.1/arch/powerpc/include/asm/
Dbitops.h82 DEFINE_BITOP(set_bits, or, "")
131 set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); in DEFINE_CLROP()
/linux-6.12.1/drivers/hwmon/
Dgl518sm.c299 #define set_bits(type, suffix, value, reg, mask, shift) \ macro
322 set_bits(type, suffix, value, reg, 0x00ff, 0)
324 set_bits(type, suffix, value, reg, 0xff00, 8)
328 set_bits(BOOL, fan_auto1, fan_auto1, GL518_REG_MISC, 0x08, 3);
337 set_bits(BOOL, beep_enable, beep_enable, GL518_REG_CONF, 0x04, 2);
/linux-6.12.1/drivers/gpu/drm/i915/gvt/
Dinterrupt.c347 u32 set_bits = 0; in update_upstream_irq() local
371 set_bits |= (1 << bit); in update_upstream_irq()
383 vgpu_vreg(vgpu, isr) |= set_bits; in update_upstream_irq()
390 vgpu_vreg(vgpu, iir) |= (set_bits & ~vgpu_vreg(vgpu, imr)); in update_upstream_irq()
/linux-6.12.1/drivers/gpio/
Dgpio-thunderx.c277 u64 set_bits, clear_bits; in thunderx_gpio_set_multiple() local
281 set_bits = bits[bank] & mask[bank]; in thunderx_gpio_set_multiple()
283 writeq(set_bits, txgpio->register_base + (bank * GPIO_2ND_BANK) + GPIO_TX_SET); in thunderx_gpio_set_multiple()
/linux-6.12.1/arch/powerpc/kernel/
Dsyscall.c88 set_bits(_TIF_RESTOREALL, &current_thread_info()->flags); in system_call_exception()
/linux-6.12.1/include/trace/events/
Dbtrfs.h2060 u64 start, u64 len, unsigned set_bits),
2062 TP_ARGS(tree, start, len, set_bits),
2070 __field( unsigned, set_bits)
2081 __entry->set_bits = set_bits;
2088 __print_flags(__entry->set_bits, "|", EXTENT_FLAGS))
2126 u64 start, u64 len, unsigned set_bits, unsigned clear_bits),
2128 TP_ARGS(tree, start, len, set_bits, clear_bits),
2136 __field( unsigned, set_bits)
2148 __entry->set_bits = set_bits;
2156 __print_flags(__entry->set_bits , "|", EXTENT_FLAGS),
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Dael1002.c81 unsigned short set_bits; member
91 rv->set_bits); in set_phy_regs()
95 rv->set_bits); in set_phy_regs()
/linux-6.12.1/drivers/net/ethernet/smsc/
Dsmc91c92_cs.c262 #define set_bits(v, p) outw(inw(p)|(v), (p)) macro
702 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR); in osi_setup()
704 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR); in osi_setup()
736 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR); in smc91c92_resume()
737 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR); in smc91c92_resume()
1442 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR); in smc_interrupt()
1627 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR); in smc_set_xcvr()
/linux-6.12.1/drivers/media/radio/si4713/
Dsi4713.c76 #define set_bits(p, v, b, m) (((p) & ~(m)) | ((v) << (b))) macro
1203 val = set_bits(val, ctrl->val, bit, mask); in si4713_s_ctrl()
1330 p = set_bits(p, stereo, 1, 1 << 1); in si4713_s_modulator()
1331 p = set_bits(p, rds, 2, 1 << 2); in si4713_s_modulator()
/linux-6.12.1/drivers/firewire/
Dcore.h65 int clear_bits, int set_bits);

12