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Searched refs:sdmax_rlcx_doorbell (Results 1 – 17 of 17) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdkfd/
Dkfd_mqd_manager_vi.c374 m->sdmax_rlcx_doorbell = in update_mqd_sdma()
411 m->sdmax_rlcx_doorbell = in restore_mqd_sdma()
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_arcturus.c155 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA0_RLC0_DOORBELL, in kgd_arcturus_hqd_sdma_load()
Damdgpu_amdkfd_gc_9_4_3.c91 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA_RLC0_DOORBELL, in kgd_gfx_v9_4_3_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v8.c288 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA0_RLC0_DOORBELL, in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v10_3.c391 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA0_RLC0_DOORBELL, in hqd_sdma_load_v10_3()
Damdgpu_amdkfd_gfx_v11.c376 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA0_QUEUE0_DOORBELL, in hqd_sdma_load_v11()
Damdgpu_amdkfd_gfx_v10.c405 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA0_RLC0_DOORBELL, in kgd_hqd_sdma_load()
Damdgpu_amdkfd_gfx_v9.c416 data = REG_SET_FIELD(m->sdmax_rlcx_doorbell, SDMA0_RLC0_DOORBELL, in kgd_hqd_sdma_load()
Dsdma_v7_0.c884 m->sdmax_rlcx_doorbell = REG_SET_FIELD(0, SDMA0_QUEUE0_DOORBELL, ENABLE, 1); in sdma_v7_0_mqd_init()
Dsdma_v6_0.c862 m->sdmax_rlcx_doorbell = REG_SET_FIELD(0, SDMA0_QUEUE0_DOORBELL, ENABLE, 1); in sdma_v6_0_mqd_init()
Dsdma_v5_2.c848 m->sdmax_rlcx_doorbell = REG_SET_FIELD(0, SDMA0_RLC0_DOORBELL, ENABLE, 1); in sdma_v5_2_mqd_init()
Dsdma_v5_0.c998 m->sdmax_rlcx_doorbell = REG_SET_FIELD(0, SDMA0_RLC0_DOORBELL, ENABLE, 1); in sdma_v5_0_mqd_init()
/linux-6.12.1/drivers/gpu/drm/amd/include/
Dvi_structs.h46 uint32_t sdmax_rlcx_doorbell; member
Dv9_structs.h46 uint32_t sdmax_rlcx_doorbell; member
Dv12_structs.h558 uint32_t sdmax_rlcx_doorbell; // offset: 15 (0xF) member
Dv11_structs.h560 uint32_t sdmax_rlcx_doorbell; // offset: 17 (0x11) member
Dv10_structs.h561 uint32_t sdmax_rlcx_doorbell; member