Searched refs:sclk_dpm_enable_mask (Results 1 – 13 of 13) sorted by relevance
167 uint32_t sclk_dpm_enable_mask; member
154 uint32_t sclk_dpm_enable_mask; member
177 uint32_t sclk_dpm_enable_mask; member
208 uint32_t sclk_dpm_enable_mask; member
3050 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) { in smu7_force_dpm_highest()3052 tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask; in smu7_force_dpm_highest()3091 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) in smu7_upload_dpm_level_enable_mask()3094 data->dpm_level_enable_mask.sclk_dpm_enable_mask, in smu7_upload_dpm_level_enable_mask()3132 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) { in smu7_force_dpm_lowest()3134 data->dpm_level_enable_mask.sclk_dpm_enable_mask); in smu7_force_dpm_lowest()4357 data->dpm_level_enable_mask.sclk_dpm_enable_mask = in smu7_generate_dpm_level_enable_mask()4931 data->dpm_level_enable_mask.sclk_dpm_enable_mask & mask, in smu7_force_clock_level()5626 if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) { in smu7_patch_compute_profile_mode()5628 tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask; in smu7_patch_compute_profile_mode()[all …]
110 u32 sclk_dpm_enable_mask; member
3261 pi->dpm_level_enable_mask.sclk_dpm_enable_mask = in ci_populate_all_graphic_levels()3779 if (pi->dpm_level_enable_mask.sclk_dpm_enable_mask) { in ci_upload_dpm_level_enable_mask()3782 pi->dpm_level_enable_mask.sclk_dpm_enable_mask); in ci_upload_dpm_level_enable_mask()4134 pi->dpm_level_enable_mask.sclk_dpm_enable_mask = in ci_generate_dpm_level_enable_mask()4190 pi->dpm_level_enable_mask.sclk_dpm_enable_mask) { in ci_dpm_force_performance_level()4192 tmp = pi->dpm_level_enable_mask.sclk_dpm_enable_mask; in ci_dpm_force_performance_level()4229 pi->dpm_level_enable_mask.sclk_dpm_enable_mask) { in ci_dpm_force_performance_level()4231 pi->dpm_level_enable_mask.sclk_dpm_enable_mask); in ci_dpm_force_performance_level()
910 hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask = in vegam_populate_all_graphic_levels()915 (hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask >> i) & 0x1; in vegam_populate_all_graphic_levels()
1099 hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask = in polaris10_populate_all_graphic_levels()1104 (hw_data->dpm_level_enable_mask.sclk_dpm_enable_mask & (1 << i)) >> i; in polaris10_populate_all_graphic_levels()
1043 data->dpm_level_enable_mask.sclk_dpm_enable_mask = in fiji_populate_all_graphic_levels()
1002 data->dpm_level_enable_mask.sclk_dpm_enable_mask = in iceland_populate_all_graphic_levels()
502 data->dpm_level_enable_mask.sclk_dpm_enable_mask = in ci_populate_all_graphic_levels()
732 data->dpm_level_enable_mask.sclk_dpm_enable_mask = in tonga_populate_all_graphic_levels()