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Searched refs:rptr_addr (Results 1 – 12 of 12) sorted by relevance

/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ih.c72 ih->rptr_addr = dma_addr + ih->ring_size + 4; in amdgpu_ih_ring_init()
99 ih->rptr_addr = adev->wb.gpu_addr + rptr_offs * 4; in amdgpu_ih_ring_init()
134 amdgpu_device_wb_free(adev, (ih->rptr_addr - ih->gpu_addr) / 4); in amdgpu_ih_ring_fini()
Dsi_dma.c131 uint64_t rptr_addr; in si_dma_start() local
151 rptr_addr = ring->rptr_gpu_addr; in si_dma_start()
153 WREG32(DMA_RB_RPTR_ADDR_LO + sdma_offsets[i], lower_32_bits(rptr_addr)); in si_dma_start()
154 WREG32(DMA_RB_RPTR_ADDR_HI + sdma_offsets[i], upper_32_bits(rptr_addr) & 0xFF); in si_dma_start()
Damdgpu_ih.h65 uint64_t rptr_addr; member
Dgfx_v6_0.c2053 u64 rptr_addr; in gfx_v6_0_cp_gfx_resume() local
2081 rptr_addr = ring->rptr_gpu_addr; in gfx_v6_0_cp_gfx_resume()
2082 WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v6_0_cp_gfx_resume()
2083 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v6_0_cp_gfx_resume()
2150 u64 rptr_addr; in gfx_v6_0_cp_compute_resume() local
2167 rptr_addr = ring->rptr_gpu_addr; in gfx_v6_0_cp_compute_resume()
2168 WREG32(mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v6_0_cp_compute_resume()
2169 WREG32(mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v6_0_cp_compute_resume()
2186 rptr_addr = ring->rptr_gpu_addr; in gfx_v6_0_cp_compute_resume()
2187 WREG32(mmCP_RB2_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v6_0_cp_compute_resume()
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Dgfx_v11_0.c3534 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() local
3559 rptr_addr = ring->rptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3560 WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v11_0_cp_gfx_resume()
3561 WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & in gfx_v11_0_cp_gfx_resume()
3597 rptr_addr = ring->rptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3598 WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v11_0_cp_gfx_resume()
3599 WREG32_SOC15(GC, 0, regCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & in gfx_v11_0_cp_gfx_resume()
Dgfx_v7_0.c2532 u64 rb_addr, rptr_addr; in gfx_v7_0_cp_gfx_resume() local
2563 rptr_addr = ring->rptr_gpu_addr; in gfx_v7_0_cp_gfx_resume()
2564 WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v7_0_cp_gfx_resume()
2565 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v7_0_cp_gfx_resume()
Dgfx_v12_0.c2579 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v12_0_cp_gfx_resume() local
2605 rptr_addr = ring->rptr_gpu_addr; in gfx_v12_0_cp_gfx_resume()
2606 WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v12_0_cp_gfx_resume()
2607 WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & in gfx_v12_0_cp_gfx_resume()
Dgfx_v10_0.c6350 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() local
6378 rptr_addr = ring->rptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6379 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v10_0_cp_gfx_resume()
6380 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & in gfx_v10_0_cp_gfx_resume()
6416 rptr_addr = ring->rptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6417 WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v10_0_cp_gfx_resume()
6418 WREG32_SOC15(GC, 0, mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & in gfx_v10_0_cp_gfx_resume()
Dgfx_v8_0.c4238 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume() local
4264 rptr_addr = ring->rptr_gpu_addr; in gfx_v8_0_cp_gfx_resume()
4265 WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v8_0_cp_gfx_resume()
4266 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v8_0_cp_gfx_resume()
Dgfx_v9_0.c3326 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume() local
3350 rptr_addr = ring->rptr_gpu_addr; in gfx_v9_0_cp_gfx_resume()
3351 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr)); in gfx_v9_0_cp_gfx_resume()
3352 …WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_… in gfx_v9_0_cp_gfx_resume()
/linux-6.12.1/drivers/gpu/drm/msm/adreno/
Da5xx_gpu.h115 uint64_t rptr_addr; member
Da5xx_preempt.c235 a5xx_gpu->preempt[i]->rptr_addr = shadowptr(a5xx_gpu, gpu->rb[i]); in a5xx_preempt_hw_init()