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Searched refs:rfHSSIPara2 (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/drivers/staging/rtl8723bs/hal/
Drtl8723b_rf6052.c116 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 825… in phy_RF6052_Config_ParaFile()
119 …PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255… in phy_RF6052_Config_ParaFile()
Drtl8723b_phycfg.c324 …pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
325 …pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2… in phy_InitBBRFRegisterDefinition()
/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_rtl8256.c84 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
86 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
Dr8192E_phy.c84 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, in _rtl92e_phy_rf_read()
86 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in _rtl92e_phy_rf_read()
87 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in _rtl92e_phy_rf_read()
316 priv->phy_reg_def[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; in _rtl92e_init_bb_rf_reg_def()
317 priv->phy_reg_def[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; in _rtl92e_init_bb_rf_reg_def()
Dr8190P_def.h105 u32 rfHSSIPara2; member
/linux-6.12.1/drivers/staging/rtl8723bs/include/
Dhal_com_phycfg.h45 u32 rfHSSIPara2; /* wire parameter control2 : */ member