Home
last modified time | relevance | path

Searched refs:rf3wireOffset (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phy.c70 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
77 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
96 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, in _rtl92e_phy_rf_read()
118 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
125 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
135 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in _rtl92e_phy_rf_write()
142 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
313 priv->phy_reg_def[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; in _rtl92e_init_bb_rf_reg_def()
314 priv->phy_reg_def[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in _rtl92e_init_bb_rf_reg_def()
Dr8190P_def.h104 u32 rf3wireOffset; member
/linux-6.12.1/drivers/staging/rtl8723bs/include/
Dhal_com_phycfg.h42 u32 rf3wireOffset; /* LSSI data: */ member
/linux-6.12.1/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c210 PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); in phy_RFSerialWrite_8723B()
321 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ in phy_InitBBRFRegisterDefinition()
322 pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; in phy_InitBBRFRegisterDefinition()