Searched refs:reset_ctl (Results 1 – 8 of 8) sorted by relevance
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
D | smu_v13_0_10.c | 32 static bool smu_v13_0_10_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in smu_v13_0_10_is_mode2_default() argument 34 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_is_mode2_default() 42 smu_v13_0_10_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_get_reset_handler() argument 46 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_get_reset_handler() 50 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_get_reset_handler() 56 if (smu_v13_0_10_is_mode2_default(reset_ctl) && in smu_v13_0_10_get_reset_handler() 58 for_each_handler(i, handler, reset_ctl) { in smu_v13_0_10_get_reset_handler() 98 smu_v13_0_10_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in smu_v13_0_10_mode2_prepare_hwcontext() argument 102 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_prepare_hwcontext() 118 struct amdgpu_reset_control *reset_ctl = in smu_v13_0_10_async_reset() local [all …]
|
D | sienna_cichlid.c | 34 static bool sienna_cichlid_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in sienna_cichlid_is_mode2_default() argument 37 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_is_mode2_default() 47 sienna_cichlid_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_get_reset_handler() argument 54 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_get_reset_handler() 60 if (sienna_cichlid_is_mode2_default(reset_ctl)) { in sienna_cichlid_get_reset_handler() 61 for_each_handler(i, handler, reset_ctl) { in sienna_cichlid_get_reset_handler() 99 sienna_cichlid_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in sienna_cichlid_mode2_prepare_hwcontext() argument 103 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_prepare_hwcontext() 119 struct amdgpu_reset_control *reset_ctl = in sienna_cichlid_async_reset() local 121 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_async_reset() [all …]
|
D | aldebaran.c | 34 static bool aldebaran_is_mode2_default(struct amdgpu_reset_control *reset_ctl) in aldebaran_is_mode2_default() argument 36 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_is_mode2_default() 46 aldebaran_get_reset_handler(struct amdgpu_reset_control *reset_ctl, in aldebaran_get_reset_handler() argument 50 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_get_reset_handler() 54 if (aldebaran_is_mode2_default(reset_ctl)) in aldebaran_get_reset_handler() 63 for_each_handler(i, handler, reset_ctl) { in aldebaran_get_reset_handler() 104 aldebaran_mode2_prepare_hwcontext(struct amdgpu_reset_control *reset_ctl, in aldebaran_mode2_prepare_hwcontext() argument 108 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_mode2_prepare_hwcontext() 121 struct amdgpu_reset_control *reset_ctl = in aldebaran_async_reset() local 123 struct amdgpu_device *adev = (struct amdgpu_device *)reset_ctl->handle; in aldebaran_async_reset() [all …]
|
D | amdgpu_reset.h | 60 int (*prepare_env)(struct amdgpu_reset_control *reset_ctl, 62 int (*prepare_hwcontext)(struct amdgpu_reset_control *reset_ctl, 64 int (*perform_reset)(struct amdgpu_reset_control *reset_ctl, 66 int (*restore_hwcontext)(struct amdgpu_reset_control *reset_ctl, 68 int (*restore_env)(struct amdgpu_reset_control *reset_ctl, 83 struct amdgpu_reset_control *reset_ctl, 152 #define for_each_handler(i, handler, reset_ctl) \ argument 154 (handler = (*reset_ctl->reset_handlers)[i]); \
|
/linux-6.12.1/drivers/net/dsa/realtek/ |
D | rtl83xx.c | 187 priv->reset_ctl = devm_reset_control_get_optional(dev, NULL); in rtl83xx_probe() 188 if (IS_ERR(priv->reset_ctl)) in rtl83xx_probe() 189 return dev_err_cast_probe(dev, priv->reset_ctl, in rtl83xx_probe() 200 if (priv->reset_ctl || priv->reset) { in rtl83xx_probe() 306 ret = reset_control_assert(priv->reset_ctl); in rtl83xx_reset_assert() 319 ret = reset_control_deassert(priv->reset_ctl); in rtl83xx_reset_deassert()
|
D | realtek.h | 53 struct reset_control *reset_ctl; member
|
/linux-6.12.1/drivers/gpu/drm/mediatek/ |
D | mtk_disp_merge.c | 70 struct reset_control *reset_ctl; member 107 reset_control_reset(priv->reset_ctl); in mtk_merge_stop_cmdq() 334 priv->reset_ctl = devm_reset_control_get_optional_exclusive(dev, NULL); in mtk_disp_merge_probe() 335 if (IS_ERR(priv->reset_ctl)) in mtk_disp_merge_probe() 336 return PTR_ERR(priv->reset_ctl); in mtk_disp_merge_probe()
|
D | mtk_ethdr.c | 83 struct reset_control *reset_ctl; member 280 reset_control_reset(priv->reset_ctl); in mtk_ethdr_stop() 363 priv->reset_ctl = devm_reset_control_array_get_optional_exclusive(dev); in mtk_ethdr_probe() 364 if (IS_ERR(priv->reset_ctl)) in mtk_ethdr_probe() 365 return dev_err_probe(dev, PTR_ERR(priv->reset_ctl), in mtk_ethdr_probe()
|