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Searched refs:regw (Results 1 – 3 of 3) sorted by relevance

/linux-6.12.1/drivers/media/platform/ti/davinci/
Dvpif.h25 #define regw(value, reg) writel(value, (reg + vpif_base)) macro
131 regw((regr(reg)) | (0x01 << bit), reg); in vpif_set_bit()
136 regw(((regr(reg)) & ~(0x01 << bit)), reg); in vpif_clr_bit()
213 #define channel0_intr_assert() (regw((regr(VPIF_CH0_CTRL)|\
217 #define channel1_intr_assert() (regw((regr(VPIF_CH1_CTRL)|\
221 #define channel2_intr_assert() (regw((regr(VPIF_CH2_CTRL)|\
225 #define channel3_intr_assert() (regw((regr(VPIF_CH3_CTRL)|\
266 regw((regr(VPIF_CH0_CTRL) | (VPIF_CH0_EN)), VPIF_CH0_CTRL); in enable_channel0()
268 regw((regr(VPIF_CH0_CTRL) & (~VPIF_CH0_EN)), VPIF_CH0_CTRL); in enable_channel0()
275 regw((regr(VPIF_CH1_CTRL) | (VPIF_CH1_EN)), VPIF_CH1_CTRL); in enable_channel1()
[all …]
Dvpif.c299 regw(value, vpifregs[channel_id].h_cfg); in vpif_set_mode_info()
304 regw(value, vpifregs[channel_id].v_cfg_00); in vpif_set_mode_info()
309 regw(value, vpifregs[channel_id].v_cfg_01); in vpif_set_mode_info()
314 regw(value, vpifregs[channel_id].v_cfg_02); in vpif_set_mode_info()
317 regw(value, vpifregs[channel_id].v_cfg); in vpif_set_mode_info()
369 regw(value, reg); in config_vpif_params()
373 regw((vpifparams->video_params.hpitch), in config_vpif_params()
395 regw(0x80, VPIF_REQ_SIZE); in vpif_set_video_params()
396 regw(0x01, VPIF_EMULATION_CTRL); in vpif_set_video_params()
409 regw(value, vpifregs[channel_id].vanc0_strt); in vpif_set_vbi_display_params()
[all …]
/linux-6.12.1/drivers/ata/
Dpata_sis.c656 u16 regw; in sis_fixup() local
660 pci_read_config_word(pdev, 0x50, &regw); in sis_fixup()
661 if (regw & 0x08) in sis_fixup()
662 pci_write_config_word(pdev, 0x50, regw & ~0x08); in sis_fixup()
663 pci_read_config_word(pdev, 0x52, &regw); in sis_fixup()
664 if (regw & 0x08) in sis_fixup()
665 pci_write_config_word(pdev, 0x52, regw & ~0x08); in sis_fixup()