Searched refs:reg_table (Results 1 – 9 of 9) sorted by relevance
| /linux-6.12.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.c | 1434 struct atom_mc_reg_table *reg_table) in amdgpu_atombios_init_mc_reg_table() argument
1442 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in amdgpu_atombios_init_mc_reg_table()
1471 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table()
1473 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table()
1479 reg_table->last = i; in amdgpu_atombios_init_mc_reg_table()
1485 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in amdgpu_atombios_init_mc_reg_table()
1488 for (i = 0, j = 1; i < reg_table->last; i++) { in amdgpu_atombios_init_mc_reg_table()
1489 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table()
1490 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in amdgpu_atombios_init_mc_reg_table()
1493 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
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| D | amdgpu_atombios.h | 179 struct atom_mc_reg_table *reg_table);
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| /linux-6.12.1/drivers/media/i2c/ |
| D | imx214.c | 430 const struct reg_8 *reg_table; member
435 .reg_table = mode_4096x2304,
440 .reg_table = mode_1920x1080,
842 ret = imx214_write_table(imx214, mode->reg_table); in imx214_start_streaming()
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| /linux-6.12.1/drivers/net/wireless/mediatek/mt7601u/ |
| D | initvals_phy.h | 264 static const struct reg_table { struct
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| D | phy.c | 291 const struct reg_table *t; in mt7601u_load_bbp_temp_table_bw()
303 const struct reg_table *t; in mt7601u_bbp_temp()
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| /linux-6.12.1/sound/soc/codecs/ |
| D | mt6660.c | 225 struct reg_table { struct
231 static const struct reg_table mt6660_setting_table[] = { argument
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| /linux-6.12.1/drivers/gpu/drm/radeon/ |
| D | radeon_atombios.c | 3985 struct atom_mc_reg_table *reg_table) in radeon_atom_init_mc_reg_table() argument
3993 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in radeon_atom_init_mc_reg_table()
4022 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table()
4024 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table()
4030 reg_table->last = i; in radeon_atom_init_mc_reg_table()
4036 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in radeon_atom_init_mc_reg_table()
4039 for (i = 0, j = 1; i < reg_table->last; i++) { in radeon_atom_init_mc_reg_table()
4040 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table()
4041 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in radeon_atom_init_mc_reg_table()
4044 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
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| D | radeon.h | 346 struct atom_mc_reg_table *reg_table);
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| /linux-6.12.1/drivers/gpu/drm/i915/ |
| D | i915_cmd_parser.c | 839 const struct drm_i915_reg_descriptor *reg_table, in check_sorted() argument
847 u32 curr = i915_mmio_reg_offset(reg_table[i].addr); in check_sorted()
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